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四选一选择器,输入四个,输出1个.当NM=00时选A 当NM=01时选B 当NM=10时选C 当NM=11时选D...
四选一选择器,输入四个,输出1个.当NM=00时选A 当NM=01时选B 当NM=10时选C 当NM=11时选D-four elected a selector, the importation of four, Output 1. When NM = 00 A at the election when NM = 01 am when the election NM B = C 10:00 when the election NM = 11:00 election D
- 2023-04-13 16:10:03下载
- 积分:1
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reed_solom
REEDSOLOMON source code
- 2010-04-30 17:44:52下载
- 积分:1
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串口程序,基于VHDL 的,很好的程序
快下吧
串口程序,基于VHDL 的,很好的程序
快下吧-Serial procedures, based on VHDL, and a very good program, are you fast
- 2022-02-04 10:08:53下载
- 积分:1
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ZBT-sram控制器VHDL.doc
----------------------------------------------------------------------------------
-- Company: VISENGI S.L. (www.visengi.com) - URJC
FRAV Group (www.frav.es)
-- Engineer: Victor Lopez Lorenzo (victor.lopez (at)
visengi (dot) com)
--
-- Create Date: 12:39:50 06-Oct-2008
-- Pr
- 2022-03-02 23:54:43下载
- 积分:1
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蓝牙HCI―UART与并口的FPGA控制接口设计
蓝牙HCI―UART与并口的FPGA控制接口设计-Bluetooth HCI-UART and parallel port control interface of the FPGA design
- 2022-07-10 22:33:51下载
- 积分:1
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FPGA
基于FPGA的电机控制
FPGA-basedMotorControl-FPGA-based motor control FPGA-basedMotorControl
- 2022-04-13 15:15:14下载
- 积分:1
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Interleaver
基于FPGA实现交织 在通信中交织的算法 已在板上通过测试(based on FPGA to Interleaver)
- 2018-02-01 20:54:13下载
- 积分:1
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digital-PLL
收集的关于数字锁相环的理论模型和分析讨论,适用于FPGA的数字电路设计。(Theoretical models and analysis and discussion about digital PLL collected for FPGA-based digital circuit design.)
- 2015-02-11 10:39:31下载
- 积分:1
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2003101190493221
还好用,大家一起来看下,不错的图书管理软件啊 ,呵呵(Fortunately with, everyone look, the good library management software, ah, huh, huh)
- 2010-09-14 13:08:40下载
- 积分:1
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lab4
xilinx 的edk软件的应用软件开发入门 (xilinx edk)
- 2010-08-05 00:56:59下载
- 积分:1