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介绍了硬件语言的仿真软件modelsimse的操作是使用方法,可以为入门的参考资料...
介绍了硬件语言的仿真软件modelsimse的操作是使用方法,可以为入门的参考资料-Introduction of the hardware language modelsimse operation simulation software is to use the method of reference for the entry
- 2022-02-26 21:45:07下载
- 积分:1
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一个在CPLD,EPM70128上实现的PWM控制源程序。
一个在CPLD,EPM70128上实现的PWM控制源程序。-A CPLD, EPM70128 realize the PWM control on the source.
- 2022-05-08 12:21:41下载
- 积分:1
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输入正确密码显示绿灯亮 错误时红灯亮并发出警报 运行环境为matplaux 2...
输入正确密码显示绿灯亮 错误时红灯亮并发出警报 运行环境为matplaux 2-a afdg jhg dfgh r fbnrfer
- 2023-02-24 12:15:03下载
- 积分:1
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软件开发环境:ISE 7.1i
仿真环境:ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共...
软件开发环境:ISE 7.1i
仿真环境:ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共八个灯的交通灯控制器;
2. 工程在project文件夹中,双击traffic.ise文件打开工程;
3. 源文件在rtl文件夹中,traffic.v为设计文件,traffic_tb.tbw是仿真波形文件;
4. 打开工程后,在工程浏览器中选择traffic_tb.tbw,在Process View中双击“Simulation Behavioral Model”选项,进行行为仿真,即可得到仿真结果。-Software development environment: ISE 7.1i simulation environment: ISE Simulator1. Realize this instance through the ISE Simulator tool to achieve a total of eight lights in both directions of traffic lights controller 2. Works project folder, double-click traffic.ise Open the project document 3. rtl source file in the folder, traffic.v for design documents, traffic_tb.tbw is the simulation waveform files 4. to open a project, the project browser, select traffic_tb.tbw, in the Process View in the double hit
- 2022-08-09 15:58:02下载
- 积分:1
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LMS自适应均衡器
在通信系统中的信道带来了重要的作用。通道可以涉及许多不同类型的扭曲我们的信息。尤其是无线信道的多径失真严重。而且更严重的是这种失真是随机的。为了解决这个问题,多渠道的影响需要在均衡器接收端。这种均衡器采用不同的学习算法连续识别通道。该项目是VHDL实现LMS学习算法流水线架构。所以这个实施可以工作以更高的数据速率以较少的时钟速度的要求,因此以较少的功耗
- 2022-01-29 00:11:01下载
- 积分:1
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6通道正弦波发生器,产生频率,相位,幅值都可调的正弦波形...
6通道正弦波发生器,产生频率,相位,幅值都可调的正弦波形-6-channel sine wave generator, resulting in frequency, phase, amplitude of the sinusoidal waveform are adjustable
- 2022-10-22 04:00:03下载
- 积分:1
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FIR filter basic verilog code for implementation
FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
- 2023-05-26 11:10:02下载
- 积分:1
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Verilog HDL语言编写的5分频电路。采用两路时钟相逻辑作用产生。...
Verilog HDL语言编写的5分频电路。采用两路时钟相逻辑作用产生。-Verilog HDL prepared by the five-frequency circuits. Clock using two phase logic role.
- 2022-03-28 17:01:44下载
- 积分:1
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Verilog_traffic
若农场路无车辆,则在高速路保持绿灯。在探测农场路有车辆,高速路上的交通灯应由绿到黄,再到红,并允许农场路方向灯变绿,绿灯亮一段时间,由绿变黄再到红。(If there is no vehicle on the farm road, keep the green light on the highway. There are vehicles on the farm road, the traffic lights on the high speed road should be green to yellow, and then red, and allow the farm road lights to turn green, the green light for a period of time, from green to yellow, then to red.)
- 2020-07-17 21:08:48下载
- 积分:1
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组合下载器SCH-3-RENEW
说明: 有自己制作的下载器原理图,包含了stlinkv2,XDS100V3,USBBLASTER.原理图和封装,一款多功能下载器。(Have their own production downloader schematic diagram, contains stlinkv2, XDS100V3, USBBLASTER. Schematic diagram and encapsulation, a multi-function downloader.)
- 2019-02-28 17:27:16下载
- 积分:1