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fft_8
基二8点fftverilog实现。经过modelsim仿真通过(Base 2 fftverilog implementation at 8 o clock. Go through the modelsim simulation)
- 2021-02-21 16:49:42下载
- 积分:1
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可控制器
应用背景此代码是用于执行器和传感器,可以在网络中实现一个很好的连接与其他节点和主。关键技术VHDL代码 ;可以控制位CRC校验和填料-掩模的验收规范
- 2022-01-26 00:30:01下载
- 积分:1
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VHDL example code
电路酒窖杂志的vhdl示例。vga控制器、视频发生器等PS2鼠标vhdl
- 2022-05-06 09:12:27下载
- 积分:1
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xapp585
LVDS并行数据传输,来自XILINX官网(LVDS Parallel Data Transfer)
- 2020-06-29 08:20:02下载
- 积分:1
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CORDIC16
16次迭代的CORDIC算法,精度很高,可应用于计算反正切值(16 iterations of the CORDIC algorithm, high accuracy, can be applied to calculate arctangent)
- 2010-06-01 15:23:27下载
- 积分:1
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complex_timing_by_Primetime
用PrimeTime的技巧,解决复杂时钟问题。(The world of telecommunications chips is full of messy clocking situations. This paper will cover the tricks and tehniques that author Paul Zimmer has developed to avoid the need to pour over reams of timing reports looking for problems. Best paper winner at SNUG San Jose 2001!)
- 2012-08-05 19:07:47下载
- 积分:1
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是用VHDL语言写的对A/D转换模块的控制程序,希望对大家有帮助。...
是用VHDL语言写的对A/D转换模块的控制程序,希望对大家有帮助。-VHDL language is used on the A/D conversion module control procedures, in the hope that everyone has to help.
- 2023-05-25 06:40:03下载
- 积分:1
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基于FPGA的钢琴演奏设计
本程序应用VHDL硬件描述语言,以QuartusⅡ8.0为开发工具设计了一个具有自动演奏乐曲功能的系统,演奏乐曲为《梁祝》,具有单曲播放器功能。本程序简单易懂,可作为FPGA入门学习之用。
- 2022-07-26 23:59:39下载
- 积分:1
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fft
运用matlab实现fft变换,用于地震资料频谱分析!(FFT transform)
- 2013-09-01 16:41:57下载
- 积分:1
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RTC
verilog编写的RTC(实时时钟)包含APB总线接口、时钟计时部分等(verilog prepared by the RTC (real time clock) contains APB bus interface, clock time some other)
- 2009-12-19 23:51:50下载
- 积分:1