-
lab6
说明: 使用vivado和Xilinx开发板实现VGA图像显示,开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize VGA image display, the development board is Xilinx artix-7)
- 2020-12-08 13:10:53下载
- 积分:1
-
RS_255_223_ENCODER
RS(255,223)编码器程序
从一本书上看到的,很不错的(RS(255,223) encode , very good good good )
- 2021-05-13 00:30:02下载
- 积分:1
-
0_09_uart_tx
说明: 在FPGA板卡上面,通过单个按键实现串口的发送功能,带仿真需要自行修改一下工程配置(On the FPGA board, the sending function of the serial port is realized by a single key, and the engineering configuration needs to be modified by the simulation)
- 2020-03-26 08:40:39下载
- 积分:1
-
ldpc_decoder_802_3an
LDPC的编码模块和解码模块,实现802-3an协议的编码(The module of LDPC to implement the coding of the 802-3an protocol)
- 2018-07-23 15:01:20下载
- 积分:1
-
chenxu
电子时钟,可以显示四位,两位显示分钟,两位显示秒,可以用按键控制清零,以及加减数(Electronic clock, you can display four bit, two bit display minutes, the second display seconds, can be used to control the key to clear, and the addition of subtraction)
- 2017-04-22 21:29:14下载
- 积分:1
-
cppOrbitTools
tle转换为六根数的c++源代码,英文原版代码,测试可用(tle converted to six the number of c++ source code, the English original code, test available)
- 2021-03-16 10:49:21下载
- 积分:1
-
eetop.cn_dds
基于verilog的DDS设计,内附代码,仿真环境等说明(the DDS design based on verilog)
- 2015-07-14 08:20:51下载
- 积分:1
-
步进电机位置系统
步进电机位置系统block symbol file
步进电机位置系统的Verilog HDL程序设计
已编译通过
步进电机位置系统
步进电机位置系统block symbol file
步进电机位置系统的Verilog HDL程序设计
已编译通过-Stepper motor stepper motor position location system system block symbol file location stepper motor system Verilog HDL program design has been compiled through
- 2022-04-25 13:54:32下载
- 积分:1
-
asynchronous reset state machine
异步复位状态机
-- State Machine with Asynchronous Reset
-- dowload from: www.fpga.com.cn & www.pld.com.cn
-asynchronous reset state machine-- State Machine with Asynchronou "s Reset-- dowload from : www.fpga.com.cn
- 2023-07-14 12:30:03下载
- 积分:1
-
sdram
数字ic设计,二级缓存,格雷码,深度256,(Digital IC design, two level cache, gray code, depth 256.)
- 2018-10-31 10:40:37下载
- 积分:1