verilog设计点滴经验，对fpga设计人员很有好处

说明：  ask psk 编码调制的vhdl 实现(ask psk coded modulation to achieve the VHDL)

code for fft non synthesisable in xilinx ise

ISE环境下Verilog编程实现机械按键去抖(ISE Verilog programming environment under mechanical debounces)

全部通过，是我的精心设计，完全满足初学者的要求。-all passed, I was carefully designed, fully meet the requirements of beginners.

基于VHDL开发的自动售货机系统，可实现自动售货过程中的基本功能，具有一定的代表性。-VHDL-based development of a vending machine system which can automatically process the basic functions of sales, with a certain representativeness.

基于VHDL的RS232通讯程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用-VHDL based on the RS232 communication procedures, including complete source code, locking pin, as well as download files documents can be directly downloaded using

可以给VHDL初学者看的实例，全部经过验证(VHDL beginners can see examples of all the proven)

the basic system of nexys3(soft core)

本演示使用VGA输出和DVD播放器播放视频和音频输入

一个电子中的verilog实验源代码。适合verilog初学者学习参考-an electronic experiments of Verilog source code. Suitable for beginners learning Verilog reference