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wdt
Watch Dog Counter reset the output when the given timing meets.
- 2009-08-13 19:05:09下载
- 积分:1
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verilog实现qdpsk调制解调
实现qpsk解码,适合新手学习,代码简单,好用(mplementation of QPSK decoding)
- 2018-11-16 23:36:38下载
- 积分:1
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Version1
小波包分解,重构轴承振动信号,Hilbert包络,FFT进行频谱分析,以获得轴承故障频率。(Wavelet packet decomposition, reconstruction of bearing vibration signal, Hilbert envelope, FFT spectrum analysis to obtain the bearing fault frequencies.)
- 2013-07-17 11:37:05下载
- 积分:1
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code
浙江大学体系结构实验代码 实现流水线的forwarding(Architecture, Zhejiang University Experimental code pipeline forwarding)
- 2020-09-26 11:57:46下载
- 积分:1
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四位静态数码管控制器,含详细的中文注释,VERILOT源码....
四位静态数码管控制器,含详细的中文注释,VERILOT源码.-4 static digital tube controller, with detailed notes in Chinese, VERILOT source.
- 2022-03-29 22:12:43下载
- 积分:1
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BCH_EncDec_Matlab
bch编解码的完整版,本人已经做过fpga实现,就是按照该程序为原型,绝对可运行(bch decoding the full version, I have done fpga implementation is in accordance with the procedure for the prototype, can certainly run)
- 2011-10-27 21:55:11下载
- 积分:1
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VHDL I2C模式
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- 2022-01-25 13:58:21下载
- 积分:1
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COSTAS_LOOP
用verilog编写的科斯塔斯环,希望有帮助(Costas loop written in verilog helpful)
- 2012-10-31 23:01:23下载
- 积分:1
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Opencore的IP Core,有实际合成过,可以用,大家参考
Opencore的IP Core,有实际合成过,可以用,大家参考-Opencore of the IP Core, there is a practical synthesis that we could use, we refer to see
- 2022-01-22 05:22:44下载
- 积分:1
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check_net_test
用来检查FPGA通过PHY发送数据时是否有掉帧的现象(FPGA is used to check whether the PHY sends the data out of the frame with the phenomenon of)
- 2011-11-18 10:28:02下载
- 积分:1