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FPGA-powe-analysis-tool-EPE
FPGA功耗分析工具EPE用于分析FPGA系统的功耗(FPGA power analysis tools EPE is used to analyze the power consumption of the FPGA system)
- 2012-11-19 17:08:00下载
- 积分:1
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7-segment
一个7段的显示器,及按一定顺序循环得到的结果,可重复使用(A 7-segment display, and by a certain sequence and cycle the results obtained can be reused)
- 2010-01-10 18:21:33下载
- 积分:1
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sd_sdram_lcd
说明: sd_sdram_lcd
是读取SD卡中的数据,然后通过LCD显示(It is to read the data in SD card and display it by LCD)
- 2019-05-14 14:35:49下载
- 积分:1
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vhdl_fir
在matlab仿真的基础上,用maxplus2实现等波纹法的程序代码(In matlab simulation, based on the use of such corrugated maxplus2 realize law code)
- 2008-05-21 20:30:35下载
- 积分:1
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jiaotongdeng
交通灯通过数码管显示,几种模式可调,还可以时间可设,适合初学者入门参考学习。(LED traffic lights can be set to several modes adjustable time beginners reference ~ ~ ~)
- 2013-08-25 10:02:34下载
- 积分:1
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开源软核处理器OpenRisc的SOPC设计
开源软核处理器OpenRisc的SOPC设计
- 2022-01-25 21:28:54下载
- 积分:1
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IIC slave controller source code
IIC slave controller source code
- 2022-02-15 09:45:19下载
- 积分:1
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time_frequency_analysis
一种合并频率的方法对时频分析及其有用所以才上传(a fast combination)
- 2013-12-04 10:13:24下载
- 积分:1
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基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码,其功能主要有:时间设置,时间显示,跑表,分频,日期设置,日期显示等...
基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码,其功能主要有:时间设置,时间显示,跑表,分频,日期设置,日期显示等-FPGA-based multi-functional Digital Clock Design and Implementation of typhoons and rainstorms are detailed Verilog HDL source code, its functions include: time settings, time display, stopwatch, frequency, date setting, date display
- 2022-02-12 09:36:35下载
- 积分:1
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list_ch06_02_debounce
Eliminate the program of key bounce
- 2012-12-23 00:22:42下载
- 积分:1