Synopsys 8051 IP core documentation.

关于FPGA的一些例程，包括CORDIC数字计算机的设计，RS(204,188)译码器的设计等。(Some routines on FPGA include the design of CORDIC digital computers, the design of RS (204188) decoders, etc.)

参数化FFT源代码，点数和位宽可变，内附testbench和说明文档-parameters of the source code FFT, counting and variable bit-enclosing testbench and documentation

EDA中常用模块VHDL程序，不同时基的计数器由同一个外部是中输入时必备的分频函数。分频器FENPIN1/2/3(50分频=1HZ，25分频=2HZ，10分频=5HZ。稍微改变程序即可实现)-EDA VHDL modules commonly used procedure, the time- with a counter by the external input is required when the sub-frequency functions. Frequency Divider FENPIN1/2/3 (50 1HZ frequency = 25 = 2HZ-frequency, frequency = 10 points Stripper. A slight change in procedure can be realized)

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mico8  vhdl  project lattice出的小资源mcu 256luts  值得学习

基于vhdl的dds任意函数发生器的实现和仿真

code for fft non synthesisable in xilinx ise

说明：  基于fpga的spi通信测试 可与stm32进行spi通信测试(SPI communication test based on FPGA can test SPI communication with stm32)

SPI接口VHDL代码,内有说明,很详细.-SPI interface VHDL code, which has made it clear that, in great detail.

说明：  jesd204b接收部分程序和带仿真历程(Jesd204b receiving part program and simulation process)