VHDL实现的超前进位加法器

1602是目前最常用的显示器件，本例是通过verilog 代码实现1602的显示(1602 display)

用verilog hdl编写的一些例程，包括加法器/减法器等等，例子较多就不一一列举了(Verilog hdl prepared with some routines, including the adder/subtraction, etc., for example, more is not to enumerate the)

ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

mimo检测算法的FPGA实现，包括最小迫零检测算法和ML检测算法，已在ISE上仿真通过 (mimo detection algorithm for FPGA implementation, including the smallest zero forcing detection algorithm and ML detection algorithm has been simulated by ISE on)

基于fpga的数字电压表的设计，包括ad转换，bcd码转换，分频，3选1模块，小数点生成模块，显示模块组成。(Based on the FPGA digital voltage meter design, including AD conversion, BCD code conversion, frequency,3 choose1module, a decimal point generating module, display module. )

DDS信号源设计，有正弦波，方波，三角波，AM波，FM波，还有PSK,FSK,16QAM等多种信号产生。(DDS signal source design, there are sine, square wave, triangle wave, AM wave, FM wave, as well as PSK, FSK, 16QAM and other signal generation.)

Enhanced Audio Project by Dixie Xue & Wei Zhang -Enhanced Audio Project by Dixie Xue & Wei Zhang

说明：  QPSK 调制 与 解调的源代码 可综合 出波形(QPSK modulation and demodulation of the source code)

说明：  通过spi实现加速度计adxl357读取xyz三轴方向的加速度值(Accelerometers adxl357 read the acceleration value of XYZ three-axis direction through SPI)

Simetrix搭建的一个光传输仿真工程，很好的学习参考。(Simetrix built an optical transmission simulation project, a good reference for learning.)