-
以太网控制器Verilog源码(含有MAC,MII接口)
以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))
- 2017-08-18 10:32:27下载
- 积分:1
-
FFT_verilog
说明: verilog实现的FFT变换,经硬件测试其功能与Altera的FFT IP核相近(verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to)
- 2009-08-26 11:29:57下载
- 积分:1
-
Multiplier
A multiplier unit in VHDL
- 2010-01-05 11:42:02下载
- 积分:1
-
m序列在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过...
m序列在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-m sequence in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
- 2022-02-02 08:36:01下载
- 积分:1
-
电子密码锁
电子密码锁-Electronic Code Lock
- 2022-09-25 17:35:03下载
- 积分:1
-
VHDL 0~
程序用VHDL实现:
利用一秒定时测量频率
并且显示,范围0~-VHDL 0~
- 2022-05-15 03:55:50下载
- 积分:1
-
FPGA
说明: fPGA中的竞争冒险现象的来源及其解决方法(FPGA in the source of the phenomenon of competitive risk-taking and their solutions)
- 2008-12-06 17:10:46下载
- 积分:1
-
VHDL-100-examples
VHDL 的100例程代码,能够使你熟练掌握VHDL语言的编写(100 routines of VHDL code, enabling you to master the preparation of the VHDL language)
- 2012-07-31 11:17:51下载
- 积分:1
-
hamming_encodeadecode
用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错,然后将其纠错译码并输出,详细过程见仿真。(Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and then error correction decoding and output, see the detailed process simulation.)
- 2011-04-22 16:46:39下载
- 积分:1
-
ag-overview
说明: agilex fpga description
- 2019-05-13 18:21:04下载
- 积分:1