FPGAm序列发生器

win10的xilinx usb驱动，较新版本(Xilinx USB driver for win10, newer version)

UC1608 24064驱动 COG LCD驱动程序(UC1608 24064)

design a clock using KIT DE1

不同方法实现的CPU系统。同样支持加减乘，逻辑/算术移位，与或非等建议指令。(Different methods to achieve CPU system. Also supports, subtraction, multiplication, logic/arithmetic shift, and the like or recommend instruction.)

也是网络上面下载的，个人感觉写的不错，已经用于商业代码中：des加密算法的vhdl和verilog源程序 

C语言写得FIR滤波器代码，简单实用，是学习滤波器设计的好材料，附带PPT滤波器设计说明(C language written FIR filter code, simple and practical, is a good learning materials of filter design, with PPT filter design )

说明：  2018全国大学生FPGA创新设计大赛南京总决赛封闭测试题目，以及自己编写的verilog和testbench，欢迎学习借鉴(The closed test topic of the 2018 National Undergraduate FPGA innovation design competition Nanjing finals, as well as Verilog and testbench compiled by ourselves, are welcome to learn)

说明：  学习VHDL可以用得上，有很多实例，可以对照着自己写一些东西(VHDL can be useful to learn, there are many examples, can be done to write something)

说明：  基于labVIEW，控制电机等工作实例，程序基本完整(Based on labVIEW, control motor and other working cases, the program is basically complete)

The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.