匹配滤波器的verilog实现

基于FPGA的视觉电生理图像刺激系统的设计(Based on the design of FPGA visual electrophysiology image stimulation system)

基于 verilog的卷积运算代码，应用于离散小波分析。(verilog conv)

说明：  基于altera fpga的fir IP核实现希尔伯特变换，有matlab仿真(Based on Altera FPGA fir IP core to achieve Hilbert transform, matlab simulation)

MAX262是一款可程控滤波芯片,该是它的英文数据手册.(MAX262 is a programmable filter chip, which is its data sheet in English.)

Xapp 200 64 bit DDR SDRAM design files for Xilinx Vertix

测温，数码管显示，基于FPGA 的verilog程序，基于DS18B20(Temperature measurement)

说明：  Digital pre-distortion (DPD) is an advanced digital signal-processing technique that mitigates the effects of power amplifier (PA) nonlinearity in wireless transmitters. DPD plays a key role in providing efficient radio digital front-end (DFE) solutions for 3G/4G basestations and beyond. Modern FPGAs are a promising target platform for the implementation of flexible wireless DFE solutions, including DPD.

该程序实现了4*4键盘的扫描功能，并且在xilinx basys2实验板上验证可以运行，在压缩包内是完整的程序供大家参考

MX25L6445E开发时间，Verilog语言(MX25L6445E development time, Verilog language)

verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器(verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter)