这个代码是Verilog HDL。

开源软核处理器OpenRisc的SOPC设计

A VHDL source code for testing the digits and the switches on a spartan 3 basys board

基于sopc的lcd时钟，开发工具为nios ii和quartus ii9.0(Based on sopc the lcd clock, development tools for the nios ii and quartus ii9.0)

基于FPGA的FFT处理器的实现，适合做fpga的工程技术人员参考-FPGA-based realization of the FFT processor, suitable for the engineering and technical personnel fpga reference

是一个用vhdl语言编写的pwm程序，可以方便地用来和nios连接，实现对nios的功能扩展。-is a VHDL language with the PWM procedures can be used to facilitate connections and nios, nios to achieve a functional extension.

数字钟电路的实现，可以24小时计时，可调整时间！(Digital clock circuit implementation, a 24-hour timer, adjustable time!)

sobel边缘检测，用于图像处理。实现了该算法在FPGA上的实现代码。(Sobel edge detection for image processing.Implementation of the algorithm to achieve the FPGA code.)

用verilog语言实现DCT编解码 附有DCT的说明(Using Verilog language realize DCT codec with a description of DCT)

FPGA简单VGA彩条显示程序驱动程序640*480(FPGA simple VGA color display Driver 640* 480)

完整版的乘法器.相信对初学者有不小的提高-The full version of the multiplier. I believe there is not a small improvement for beginners