3 稿串行 eprom 控制器

用verilog 语言编译16QAM调制(a great complied code of 16QAM modulation for OFDM)

verilog HDL编写的浮点除法器，编译通过，可综合。压缩包包含三个文件。(verilog HDL write floating-point divider, compile, can be integrated. Archive contains three files.)

程序用VHDL实现： 频率合成，DDS 主要调用LPM-procedures using VHDL : frequency synthesis, DDS major call LPM

自己今年的毕业设计DDS波形发生器,有正弦波,方波,三角波,锯齿波.-Their own design this year

this come from alter ,you can look and find it on line about jtag.

full adder设计代码，verilog 语言描述，通过modelsim 仿真，quartus综合-full adder design code, verilog language to describe, through the ModelSim simulation, quartus integrated

说明：  使用verilog实现ppm解码器，功能仿真通过，附设计说明，THU微纳电子系ic设计课大作业。(a ppm decoder written in VerilogHDL, a design document is available)

VHDL数字系统设计和工程实践3，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, 3, including the principles, truth table and schematic, as well as VHDL source code.

DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve

基于Xilinx公司的ISE软件开发的智能循迹避障小车的源代码，用Verilog语言，传感器有红外传感器以及超声波传感器(Xilinx' s ISE-based software development intelligent car tracking avoidance source code, using Verilog language, the sensor has an infrared sensor and ultrasonic sensors)