16/64 点 FFT

VHDL语言按VGA接口标准把数字图像信号转换成标准VGA格式。适合做学习试验-VHDL by VGA interface standards, digital image signal conversion into a standard VGA format. Suitable for the pilot study

说明：  反应力测试 利用图片的变换根据用户点击的反应时间判断(Reaction force measurement using the picture of the transformation reaction time based on user clicks judgment)

Alter kit FPGA de2-35 This project shows a cascade motion through board leds.-Alter kit FPGA de2-35 This project shows a cascade motion through board leds.

altera的vga示例

利用两个半加器来组成的全加器，是简单的vhdl语言入门-The use of two and a half adder to form the full adder is a simple entry-vhdl language

设计制作一个可容纳4组参赛者的数字智力抢答器，每组设置一个抢答按键； 电路具有一第一抢答信号的鉴别和锁存的功能。在主持人将系统复位并发出抢答指令后，若参加者按抢答键，则该组指示灯亮并用组别显示抢答者的组别。此时，电路具有自锁功能，使别组的抢答开关不起作用。 设置计分电路。每组在开始时预置成6分，抢答后主持人计分，答对一次加1分。(The design can accommodate a the Entrants digital intellectual Responder, each set answer in a key circuit has a first answer in the signal to identify and latch functions. Host to the system reset and sent the answer in instruction, participants answer in key, the group of the group light and display the answer in the group. At this point, the circuit has a self-locking function does not work in other groups to answer switch. Set Scoring circuit. Preset six points each at the beginning of the answer in scoring after the host, answer time, add 1 point.)

SMT32F4 i2s 全双工配置，自己测试OK的，大家可以看看(SMT32F4 i2s 全双工配置)

基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。(FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks.)

usb控制器，有VHDL实现的，还有C++的源码，可以编译-usb controller, there is the realization of VHDL, as well as C++ source code can be compiled

用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。-VHDL hardware description language developed by miniUART Interface IP Core, Users can be embedded into their own FPGA module.