Altera DE2板专用CCD驱动器

基于 hdl语言的re232通信实验的设计，程序简单明了，一学就会(rs232 communication)

VHDL产生时钟50分频程序，供初学者参考-VHDL generated clock frequency of 50 procedures, the reference for beginners

一个简单的微处理器的实现，能够进行几种常见的操作，对于熟悉计算机的工作原理很有帮助，并且附有详细的设计报告和设计思路。在word文档最后给出了源代码。-a simple microprocessor to achieve, for several common to the operation of the computer for those familiar with the working principle helpful, and with the detailed design reports and design ideas. The word is the final document source code.

vhdl code for internet interface

基于fpga和xinlinx ise的音乐播放器vhdl程序，希望对你有所帮助！-and xinlinx ideally music player VHDL process, and I hope to help you!

Implement LMS vhdl code.

一些例子程序需要的话可以下来看看新手推荐-Some examples of procedures can be down if necessary to see novice Recommended

this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural -this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural

基于FPGA的多波形发生器 基于FPGA的多波形发生器-FPGA-based multi-waveform generator based on multi-FPGA Waveform Generator

此示例是8051核加频率计的联合设计,带有8051IP核资料-This example is the 8051 nuclear increase the frequency of joint design, with the nuclear information 8051IP