一个小液晶的程序。我没写。我只负责设计。

包括VHDL、verilog在内的各种设计实例，是学习硬件描述语言的帮手。共有82个实验例子，涉及各种语法规则。-82 VHDL, verilog test case, involving a variety of grammatical rules. which is you learn the HDL language helper.

说明：  VIVADO dma以及vdma 使用文档 基于ZYNQ 7020(vivado DMA&VDMA example text of zynq)

1．初始状态为4个方向的红灯全亮，时间1秒。 2．东、西方向绿灯亮，南、北方向红灯亮。东、西方向通车，时间30秒。 3．东、西方向黄灯闪烁，南、北方向红灯亮。时间2秒。 4．东、西方向红灯亮，南、北方向绿灯亮。南、北方向通车，时间15秒。 5．东、西方向红灯亮，南、北方向黄灯闪烁。时间2秒。 6．返回2，继续运行。 -1. Initial state for four whole direction of the red lights lit up, a second time. 2. East and West to the green, in the south, north to the red light. West and the East to open in time for 30 seconds. 3. East and West to the blinking yellow light, in the south, north to the red light. Time 2 seconds. 4. East and West to the red light, in the south, north to the green. South and North to the opening time of 15 seconds. 5. East and West to the red light, in the south, north to the flashing yellow light. Time 2 seconds. 6. Return 2, continued to operate.

IIC总线协议，VHDL语言编写，可以直接使用-IIC bus protocol, VHDL language can be used directly

i2c总线的工程实现，可以用在altera环境下验证-i2c bus project implementation can be used in altera verification environment

library of protues aaaaaaaa

huawei代码编码规范，包含基本的verilog的语法等编码规范，业界经典(Huawei code coding specification, including the basic syntax of the Verilog code, the industry classic)

这是一个利用verilog语言编写的信号发生器的例子，值得参考(this is a code about signal generator by VIERILOG LANGUAGE!)

FPGA做波形发生器，产生8种波形，包括三角波，正弦波，锯齿波，方波等。(FPGA is used as waveform generator,Generate 8 waveforms, including triangle, sine, sawtooth, square, etc.)

wallace tree multiplier in verrilog