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ripple adder
设计的结构是纹波进位加法器架构,但执行的操作是32位加法和32位减法
- 2023-07-02 19:50:04下载
- 积分:1
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M_M
此为数学形态滤波器消燥的代码,用于一维信号,涉及一个具体的例子,需要的话可以自己修改,修改相应的结构元素。(This is a mathematical morphology filter away dry code, used to one dimensional signal, involving a concrete example, necessary can change ourselves, change the structure of the corresponding elements)
- 2013-08-29 21:36:37下载
- 积分:1
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拔河电路的设计
VHDL拔河电路的设计 基于cyclone V
VHDL拔河电路的设计 基于cyclone V
VHDL巴赫电路的设计 基于cyclone V
VHDL巴赫电路的设计 基于cyclone V
VHDL巴赫电路的设计 基于cyclone V
- 2022-07-16 17:58:29下载
- 积分:1
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Nut
UG二次开发,课程作业,研究生,学习,初学者,打孔,复杂体,阵列
UG C program,homework,student,study,first,hole,complex,many(
UG C program,homework,student,study,first,hole,complex,many)
- 2015-01-15 12:26:29下载
- 积分:1
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键盘输入串口输出显示字符,通过串口显示键盘输入的字符
键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters
- 2022-04-13 11:20:18下载
- 积分:1
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dds
基于DDS的信号源设计(包括三角波、正弦波、方波)(Design of signal source based on DDS)
- 2018-01-01 18:06:51下载
- 积分:1
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the-verilog-code-of-can-usb-i2c
CAN总线,I2C,USB等的FPGA实现源码(CAN bus, I2C, USB, etc. FPGA implementation source)
- 2012-12-15 01:25:33下载
- 积分:1
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DE0-PWM-Led-Drive---simulation
DE0_PWM_LED_DRİ VE_Sİ MULATİ ON
- 2015-12-04 16:32:56下载
- 积分:1
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Digital signal source, the output of different frequency, phase is the cosine si...
数字信号源,输出不同频率,相位的正余弦信号,-Digital signal source, the output of different frequency, phase is the cosine signal,
- 2022-04-23 09:40:37下载
- 积分:1
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pll_carrier_syn
本程序是锁相环的仿真程序,具有接收端载波同步的功能。注释详尽,程序规范。发端的调制方式有单载波调制,BPSK调制,QPSK调制可供选择。程序中有星座图,锁相环的频差、相差图,以及解调后的基带波形。(This program is a phase-locked loop simulation program, the with carrier synchronization receiving end function. Notes detailed program specifications. The originator of the modulation scheme to choose a single carrier modulation, BPSK modulation, QPSK modulation. Program constellation diagram, the PLL frequency difference, a difference of FIG, and the demodulated baseband waveform.)
- 2013-04-11 09:18:49下载
- 积分:1