ahb 总线协议

bpsk qpsk 16qam 64qam的constellation(bpsk qpsk 16qam 64qam constellation)

an example HDL-Core with any basic gates.

设计一个简单的自动售饮料机的逻辑电路。它的投币口每次只能投入一枚五角或一元的硬币。投入一元五角钱硬币后机器自动给出一杯饮料。投入两元（两枚一元）硬币后，在给出饮料的同时找出一枚五角的硬币。

单相混合有源电力滤波器的设计与控制，在matlab中的仿真模型，功能效果很好。(The design and control of single-phase hybrid active power filter in matlab simulation model, the function works well.)

两篇中文论文，详细叙述了Farrow滤波器的设计方式和理论基础，非常实用！(Two Chinese papers, described in detail Farrow filter design methods and theoretical foundation, very useful!)

LTE is an abbreviation for Long Term Evolution.

说明：  30 bus for atp design

利用cordic实现三角函数的计算，用vhdl实现-use cordic achieve trigonometry calculations, using achieve vhdl

this is verilog code for designing ALU in fpga.

vhdl实现8255,可重用，ALATEK公司提供验证，用说明文档-achieve VHDL 8255, reusable, ALATEK companies to provide certification, with documentation