Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compe...

8051core-Verilog FPGA

说明：  此程序用来实现图像的采集和帧数的计算功能。(Image acquisition and calculation of the number of frames.)

说明：  半带滤波器，用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)

HDB3编码器与解码器，以及RTL图，使用Verilog HDL实现(HDB3 encoder and decoder, and RTL diagram, use Verilog HDL to implement)

说明：  DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的(DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good)

Altera的CycloneIII Start Board,使用的PFGA是3C25，包括原理图和PCB，用Cadence Allegro打开-Altera

verilog HDL经典的入门书籍，内容很详细，讲了许多实例，适合硬件描述语言初学者。(verilog HDL classic introductory book, the content is very detailed, spoke many instances, suitable hardware description language for beginners.)

存储示波器，功能齐全通过验证，毕业设计用-Storage oscilloscope, a full-featured validated, graduation design

vhdl 加法器 vhdl 加法器 vhdl 加法器-vhdl　adder vhdl　adder vhdl　adder

计算机组成原理的CPU实验，基于quartus平台(CPU experiment of computer organization principle, based on quartus platform)