Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compe...

VHDL语言设计；功能描述：键盘扫描，不包含去抖电路-VHDL language design Function description: the keyboard scanning, does not contain a circuit debounced

this project is about FIR FIlter By VHdl codes in the ISE.

说明：  详细介绍了如何使用ModelSim进行仿真.(it will teach you how to use the ModelSim to simulink.)

大屏幕led点阵显示的驱动时序。 使用vhdl语言描述。其中rom文件可以使用lpm_megcore自动生成。-big screen led to the dot matrix display driver timing. The use of VHDL description language. Rom which documents can be automatically generated using lpm_megcore.

一个用FPGA语言设计数字秒表的程序，有相关的源程序和说明-FPGA design using a digital stopwatch language of the procedures and instructions related to the source

串口通信例程，使用FIFO数据缓存。Verilog源码，基于FPGA的uart开发，加深理解。(uart communication)

说明：  假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 +　寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)

基于DE2_70平台，编写nios软核c代码，控制流水灯，硬件实现验证通过，适合入门(Based DE2_70 platform, written nios soft core c code, control water lights, verified by hardware implementation, suitable for entry)

电路酒窖杂志的vhdl示例。vga控制器、视频发生器等PS2鼠标vhdl

在汉明码调试中实现了纠错原理，达到更快的效果，更少的资源浪费