The design of digital self

该模块已经成功运用在xilinx xc6slx45t，xc6slx75t多个产品中，经过实践证明，采用dna及其加密算法加密是一种成本低廉（无需另外加密芯片）可靠的加密手段。Xilinx Spartan-6 FPGA读取DNA数据并进行比较，产生比较结果信号输出。附带有xilinx DNA.ppt说明及调试注意事项。(The module has been successfully used in xilinx xc6slx45t, multiple xc6slx75t products, proven, and the encryption algorithm uses dna is a low-cost (no additional encryption chip) reliable means of encryption. Xilinx Spartan-6 FPGA reads the data and compare DNA to produce a comparison result signal output. Xilinx DNA.ppt comes with instructions and commissioning notes.)

用于ATmega128的一些通讯程序，包含I2C　UART，SPI等接口，用ICCAVR编译(for ATmega128 some communications procedures, including UART I2C, SPI interfaces with ICCAVR compiler)

说明：  小波变换的开源代码（Verilog HDL）包括有测试文件，本人看过，挺好。(code of dwt)

VHDL汇编语言原理及源代码。spartan 3e开发板试用。(VHDL language.)

说明：  有关risc-v cpu的问题,里面有一些有关cpu的设计(The problem of risc-v can be solved)

非常好的verilog书 国际牛人写的 适合各个阶段学习的人(Very good Verilog books were written in the international cattle suitable for the various stages of learning)

QFSK的调制与解调，用C写的主程序，汇编写的调制与解调的子程序(QFSK the modulation and demodulation, with the main program in C, compile writing, the modulation and demodulation of the Subprogram)

基于FIR滤波器的LMS自适应算法的FPGA实现,verilog语言(FIR filter based on LMS adaptive algorithm on FPGA, VHDL language)

流水线设计是高速电路设计中的一个常用设计手段。如果某个设计的处理流程分为若干步骤，而且整个数据处理是“单流向”的，即没有反馈或者迭代运算，前一个步骤的输出是下一个步骤的输入，则可以考虑采用流水线设计方法来提高系统的工作频率。-see up

FPGA驱动高输入电压范围的ADS8509芯片，采样范围广，适合前端大信号处理(FPGA drive a high input voltage range ADS8509 chip, sampling a wide range, suitable for large front-end signal processing)