一种新的FPGA实现AES-128采用降低残留素数的S盒

PLD与8051接口的参考设计 Xilinx提供的verilog源代码-PLD 8051 interface with the Xilinx Reference Design for the Verilog source code

说明：  本文研究的IIC总线控制器具有如下特征 1.兼容飞利浦I2C标准，以主机模式与外围设备进行数据通信，对IIC从机模型进行读/读，读/写，写/写，写/读[18]。 2.多主操作 3.软件可编程时钟频率 4.时钟拉伸和等待状态生成 5.软件可编程确认位 6.时钟同步设计 7.仲裁中断丢失，自动转移取消 8.开始/停止/重复启动检测/确认生成 9.总线忙检测(The IIC bus controller studied in this paper has the following characteristics. 1. Compatible with Philips I2C standard, data communication between host mode and peripheral devices, read/read, read/write, write/write, write/read for IIC slave model [18]. 2. Multiple Main Operations 3. Software programmable clock frequency 4. Clock stretching and waiting state generation 5. Software Programmable Confirmation Bit 6. Clock Synchronization Design 7. Loss of arbitration interruption and cancellation of automatic transfer 8. Start/Stop/Repeat Start Detection/Verification Generation 9. Bus busy detection)

verilog code for bus controller

这是一个在Quartus II软件中编写的vhdl程序。程序下载后可用蜂鸣器播放音乐 -This is a Quartus II software in the preparation of the VHDL program. After the buzzer can be used to download music player

uart串口传输的verilog RTL级源码，已通过仿真验证。文件主要包含发送、接受位处理，发送、接受字节帧处理，对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of frame processing, serial communications, a friend of learning helps

matlab随即图设计程序，应该比较有用，希望能申请会员成功吧。。(matlab then drawing design program)

FPGA通过SPI总线配置AD采集芯片AD9648的程序，Verilog实现 (FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization)

通过代码控制音频编/解码硬件芯片WM8731， 通过按键控制音频输出的音量(Audio codec hardware chip WM8731 is controlled by code, and audio output volume is controlled by keys.)

VHDL语言实现PWM信号，非常方便的使用-VHDL language realize PWM signal, very convenient to use

通过上翻键和下翻键来设置方波信号正负脉冲宽度，利用一排流水灯来显示按键的次数，通过观察流水灯亮的盏数确定占空比（按一次上翻键亮一盏灯，流水灯全亮时占空比调到了最高或者是最低状态，按一次下翻键灭一盏灯，流水灯全灭时占空比调到了最低或者是最高状态）。(Duty cycle of LED lights and adjustable oscilloscope display code)