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FPGA向SRAM中写入数据,VHDL编程
FPGA向SRAM中写入数据,VHDL编程-FPGA to the SRAM write data, VHDL programming
- 2023-05-04 17:45:03下载
- 积分:1
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zongbian4
基于verilog语言的差分曼彻斯特编码,内包含数据的采集,CRC校验(8位),和编码,输出。附有完整的工程文件。可直接调用modelsim仿真。(Based on differential Manchester encoding verilog language, and contains data collection, CRC check (8), and coding. With complete project file. Modelsim simulation can be called directly.)
- 2021-03-04 09:59:32下载
- 积分:1
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sig_detect
使用信号功率计算,检测信号是否到达。从而控制后续模块,以减小系统功耗。(Signal power calculation, the detection signal to reach. To control follow-up modules to reduce system power consumption.)
- 2012-08-08 15:30:13下载
- 积分:1
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docs
papers based on distributed arithmetic.
- 2014-02-06 16:17:09下载
- 积分:1
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FPGA中嵌入8051的核 并且实现控制128*64的液晶显示
FPGA中嵌入8051的核 并且实现控制128*64的液晶显示-FPGA embedded in 8051 and to achieve control of the nuclear 128* 64 LCD
- 2023-05-15 17:55:03下载
- 积分:1
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USB接口控制器参考设计,xilinx提供的VHDL源代码
USB接口控制器参考设计,xilinx提供的VHDL源代码-USB interface controller reference design for Xilinx VHDL source code
- 2022-12-12 09:35:03下载
- 积分:1
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利用verilog语言设计实现8路FIR滤波
利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter
- 2022-01-26 16:41:16下载
- 积分:1
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veilog code user can derict use it for the base mode.
veilog 代码 用户可以直接调用,作为底层模块。同时已经编译成功,可以作为基本单元库。-veilog code user can derict use it for the base mode.
- 2023-08-09 02:40:03下载
- 积分:1
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fleverDDS_new
fpga控制da产生幅值频率可调的正弦波程序(the fpga Control da produce the amplitude adjustable frequency sine wave program)
- 2013-01-07 10:47:43下载
- 积分:1
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code
code for booths multiplier
- 2009-03-15 09:35:26下载
- 积分:1