以太网总线源代码，里面有详细的文档说明，已经过FPGA验证。...

2011年全国大学生电子设计竞赛E题“简易数字信号传输性能分析仪”fpga的控制代码，verilog编写；包括了M序列及同步时钟的提取等所有程序。(2011 National Undergraduate Electronic Design Contest E title "Simple digital signal transmission performance analyzer" fpga control code, verilog prepared including the M-sequence and synchronous clock extraction and all other programs.)

说明：  单周期cpu，使用verilog编写的的单周期cpu支持......等功能(Single cycle CPU, using Verilog written single cycle CPU support... And other functions)

Xilinx vivado 权威教程，清华大学出版社出版，何宾编著。(Xilinx vivado authoritative course, published by Tsinghua University Press, edited by He Bin.)

report for a report for a class

基于FPGA的频率测量，能测量方波信号的频率、占空比、相位差。范围100mHz~200MHz，精度0.0001Hz(The frequency measurement based on FPGA can measure the frequency, duty cycle and phase difference of the square wave signal. Range 100mHz~200MHz, precision 0.0001Hz)

lattice的官方8b10b代码, 1012年版本，diamond3.5编译。(lattice 8b10b encoder decoder code)

Convert Roman numerals to integers

Verilog语法教程，适合初学者，详细(Verilog instruction book)

vhdl,序列信号发生器，发出11101010，可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of

基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)