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com1027soft
FSK/MSK/GFSK/GMSK
DIGITAL DEMODULATOR
VHDL SOURCE CODE OVERVIEW
- 2011-03-21 22:41:15下载
- 积分:1
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我从一本书上抄来的
但用MAX+PLUSII编译有些问题
初学者
见谅...
我从一本书上抄来的
但用MAX+PLUSII编译有些问题
初学者
见谅-from a book copied but with the MAX PLUSII compile some of the problems beginners forgiven
- 2022-08-20 05:51:36下载
- 积分:1
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MIPSTOP
说明: misp顶层文件,verilog实现misp架构,并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)
- 2020-06-18 04:40:02下载
- 积分:1
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5_ADC_Lab
基于altera公司MAX10型FPGA的ADC调试程序(ADC-based debugger altera company MAX 10 type of FPGA)
- 2015-11-18 10:56:16下载
- 积分:1
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MSK_BER
msk比特误码率matlab仿真 匹配滤波器(the msk bit error rate matlab simulation matched filter)
- 2020-11-14 11:49:42下载
- 积分:1
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很不容易找到的资料,基于VHDL的频率计设计 希望有用
很不容易找到的资料,基于VHDL的频率计设计 希望有用-Not easy to find information on the frequency meter based on the VHDL design seek to help
- 2022-04-21 13:02:06下载
- 积分:1
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4-to-1
4选1数据选择器,有使能端控制,4个数据输入,2个地址端,1个输出(4 1 data selector, enable end control, four data inputs, two addresses end, an output)
- 2012-10-15 18:48:38下载
- 积分:1
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一篇用VHDL实现快速傅立叶变换的论文
一篇用VHDL实现快速傅立叶变换的论文,包括原理分析和代码实现,印度圣雄甘地大学M.A.学院提供(VHDL with a Fast Fourier Transform papers, including the principle of analysis and implementation of the code, the Mahatma Gandhi Institute of the University of Marat)
- 2004-10-05 11:06:01下载
- 积分:1
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用VHDL写的4*4乘法器,学习VHDL语言的可以
用VHDL写的4*4乘法器,学习VHDL语言的可以-Use VHDL to write the 4* 4 multiplier, learning VHDL language can be
- 2022-02-11 23:38:12下载
- 积分:1
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ser_par
24bitAD数据采样进行串并转换,并行输出。另包括24位DA并串转换,串行输出。(24bitAD data sampling and converted to strings, parallel output. Other notable features include 24-bit DA and string conversion, serial output.)
- 2009-12-10 15:46:54下载
- 积分:1