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xapp from xilinx very hard to find and very usefull application note from the gr...
xapp from xilinx very hard to find and very usefull application note from the great firm from USA
- 2022-01-25 23:53:59下载
- 积分:1
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debounce
FPGA按键延时模块,产生key_value和key_flag
可直接例化调用(The key delay module of FPGA)
- 2020-06-22 04:20:02下载
- 积分:1
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piso8_ok_bingchuanzhuanhuan
本程序是用vhdl开发的实现并串转换功能的程序。(This procedure is developed using VHDL implementation and string conversion function of the program.)
- 2017-06-07 15:50:38下载
- 积分:1
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SOUND_PLAY6
WM8731芯片的音效处理verilog代码,
WM8731芯片是音频ADCDAC芯片(WM8731 audio processing chip verilog code, WM8731 chip audio ADC DAC chip)
- 2013-12-14 14:12:10下载
- 积分:1
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led_test
在Quartus II 上编程的基于FPGA的LED显示实验(Programming in the Quartus II LED display experiment based on FPGA
)
- 2013-08-13 08:55:45下载
- 积分:1
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Some useful things to know about picoblaze microcontroller.
Some useful things to know about picoblaze microcontroller.
- 2022-06-12 10:25:48下载
- 积分:1
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apb2ahb
verilog code for apb to ahb convert
- 2021-01-05 03:38:55下载
- 积分:1
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用Verilog 实现的电子时钟,给初学者一个模版,学习Verilog。
用Verilog 实现的电子时钟,给初学者一个模版,学习Verilog。-Using Verilog realize an electronic clock, a template for beginners to learn Verilog.
- 2022-03-01 20:04:47下载
- 积分:1
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CGRA加密算法可重构
工作机制如下:
1、 系统上电,配置信息由片外加载到片上配置存储器中;
2、 执行某算法前,将此算法所有的配置包写入到配置包存储器中(配置包存储器包含在配置解析单元中);
3、 配置解析单元解析配置索引,从配置存储器中选择相应的配置对可重构阵列及功能模块进行配置;
4、 阵列从外部中读取数据进行计算,计算结果写出到密文寄存器中;
5、 可重构阵列与功能模块计算的中间结果数据只与通用寄存器堆进行交互;
6、 阵列计算的中间结果通过通用寄存器堆缓存;
- 2023-05-25 10:10:04下载
- 积分:1
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jiaotongdeng
运用VHDL语言编写的交通灯实现程序,能模拟十字路口的交通灯控制(VHDL language using traffic lights to achieve program can simulate the traffic light controlled crossroads)
- 2011-06-06 16:26:55下载
- 积分:1