IIC EDID码配置

用vhdl实现24小时计数器，方法简单实用。 仿真环境MAXPLUS--use VHDL to achieve 24-hour counter, simple and practical method. Simulation environment Segments-

matlab怎么把数据输入到modelsim，文件读写的问题(data write and read from matlab to modelsim)

四选一编程语言，可以自动生成四选一器件。-First elected four programming languages, you can automatically generate a four selected devices.

Verilog 黄金参考指南是 Verilog 硬件描述语言及其语法 语义 合并以及将它应用到硬件设计的一个简明的快速参考指南。(Verilog Golden Reference Guide is a concise and fast reference guide for Verilog Hardware Description Language and its syntax and semantics merging and its application to hardware design.)

此代码完成了流水线CPU的设计。其中有ALU，控制模块，UART等verilog代码。(This code completes the design of pipelined CPU)

fpga测温的框图和源码 希望能帮到大家 没有测试 紧供参考-fpga vhdl

现色彩空间转换R’G’B’ to Y’CbCr的VHDL源代码。-Kabuki现rough cleaning转Connaught distance RGB to Y CbCr cavity VHDL Daitou Tungsten measurements 。

说明：  彩色TFT液晶显示控制电路设计及其ASIC实现(TFT color LCD control circuit design and ASIC realization)

EKG SIGNAL PROCESSING THROUGH CORDIC

IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY