logic lock 的vhdl源码，altera平台适用。

tdma参数化模块。可以自动生成2的n次的tdma哥时隙，用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)

Spartan 3e - Active Power Meter-Spartan 3e- Active Power Meter

NOR FLASH CONTROLLER

介绍了设计和功能实现的 16 点 FFT 流水线。 架构基于利用该算法的变化规律，设计了蝴蝶操作和乘法器模块。 基数 4 算法。该体系结构采用四种蝴蝶，和管道阶段优化的处理速度和地区之间取得平衡。

8051IP 核源代码（VHDL）.RAR-8051IP nuclear source code (VHDL). RAR

UART文件 包括发送器 接收器 fifo 测试文件(UART file includes a receiver transmitter fifo test files)

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core.

这是一个瑞萨R78/G13的SPI演示程序，详细的放置了说明，很有用的源码(This is one of the SPI Renesas R78/G13 demonstration program, placed a detailed description of very useful source)

niosII的ip核的实现原理讲解，讲解的非常详细。(niosII ip nuclear realization of the principle of explanation, to explain in great detail.)

Based on SVPWM three-level inverter matlab simulation, It describes the application of load forecasting, EULER numerical analysis method.