针对于Virtex5FPGA的DDR2读写测试的完整工程

FPGA做波形发生器，产生8种波形，包括三角波，正弦波，锯齿波，方波等。(FPGA is used as waveform generator,Generate 8 waveforms, including triangle, sine, sawtooth, square, etc.)

该模块实现一个寄存器堆的操作，其中前16个仅主机能写，规给为32-bit×32。后16个仅Micorblaze能写。读取没有限制。如果双方同时对同一地址进行读写操作，读回的数将是全1。(This module implement a register file of the operation, of which the first host 16 is only able to write rules to the 32-bit × 32. Micorblaze only 16 after the write. There is no limit to read. If the two sides at the same time to read and write operations to the same address, read back would have been a full one.)

八位并行数据转换为串行数据依时钟信号串行输出(Eight bit parallel data to serial data)

控制步进电机转动，正反转，旋转角度完美掌握。很好用，亲测(Control stepping motor rotation, positive and negative rotation, perfect control of rotation angle. Very easy to use, personal test)

基于FPGA的ip核FIR低通滤波器，实现滤波功能，简单好用(FPGA-based ip core FIR filter for filtering function, easy to use)

应用背景为了实现良好的压缩性能，相关性颜色分量RGB颜色空间转换到去相关的色彩空间首先减少。在基线JPEG，一个RGB图像转化成亮度chrominancc如YCbCr颜色空间。将图像的亮度色度空间的优势的亮度和色度分量非常不相关彼此之间。此外，色度通道包含大量冗余信息可以很容易地被采样不牺牲任何视觉质量对于重建图像。从RGB到YCbCr的转换，是基于以下的数学表达：关键技术应用DCT变换，将图像划分成8´8像素块。如果原始图像的宽度或高度是不能被8整除，编码器必须整除。8´8块进行处理，从左到右，从上到下。和公司；及；及；及；及；及；及；及；及；DCT变换的像素值的空间频率。这些空间频率是非常相关的细节目前在一个图像的水平。高空间频率对应于高层次的细节，而较低频率对应于较低的细节层次。数学定义DCT是：

FPGA上用verilog写的SPWM控制程序，完美运行！自由调试，毕设内容，十分宝贵(The SPWM control program by verilog FPGA perfect run! Free commissioning, Bi-based content, invaluable)

The program is used to establish communication with the pc through serial port. It utilses the inbuilt micro controller called as picoblaze for the processing for implementation on spartan 3E

512×8bid的FIFO 含工程文件，基于QUARTUs-512 × 8bid the FIFO with the project document, based on the QUARTUsII

H.265的FPGA实现！！使用Verilog语言开发。(H.265 FPGA implementation! Developed using Verilog language.)