针对于Virtex5FPGA的DDR2读写测试的完整工程

使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。(Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has some value engineering practice.)

基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。(FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks.)

鼎lpc1788尚开发板的vga的显示，1024x768(lpc1788board,lcd to vga display,1024x768)

FPGA简单VGA彩条显示程序驱动程序640*480(FPGA simple VGA color display Driver 640* 480)

adpcm .c程序代码，完整,通过编译仿真(ADPCM c program code, complete compiled simulation)

Spartan-3E板卡XC2C64A CPLD 的代码(the XC2C64A CPLD on the Spartan-3E Starter Kit boards)

密码锁，大学数字eda课程顺序锁的源代码，有2位或者4位的顺序锁，可以在fpga或者cpld上实现 (Password lock, digital eda course the order of the source code of the locks, the order of two or four locks, and can be implemented on the fpga or cpld)

URISC的RTL级设计，Verilog代码(Design: URISC RTL Verilog)

以太网控制器verilog，含有mac,mii接口(Ethernet controller verilog, containing mac, mii interface)

针对QUARTUS的DMA的VHDL代码实现(DMA Controller Code in VHDL)