3X3矩阵乘法的VHDL程序！对初学者有很大帮助！

ADS7870 Serial ADC Interface Using a CPLD, The system includes an XPLA3 CoolRunner CPLD, a Texas Instruments ADS7870 ADC, and a Toshiba SRAM, All related VHDL source code is provided

Verilog code for RS-(255,239) encoder.

本人初学VHDL时编的比较系统的VHDL源程序 巨实用 (I am learning more systematic series of practical VHDL source Giant)

用FPGA实现的VGA接口程序，采用的语言是VHDL硬件描述语言，大家可以参照下看看采用的器件是Altera EP2c35-Using FPGA to achieve the VGA interface program, the language used is VHDL hardware description language, we can see under the light of the devices used are Altera EP2c35

用VHDL硬件语言实现的iic顶层控制程序-Using VHDL hardware language to achieve the top level of the IIC control procedures

Giao tiep Univesan ...

基于NIOS2的VGA接口IP核，具有很好的借鉴性和参考性(NIOS VGA IP)

基于Montgoery 算法的RSA,FPGA verilog 实现，有测试文件(Based on Montgoery algorithm for RSA,FPGA verilog implementation，bench file)

说明：  在quartus下搭建的数字锁相环，能实现频率自动跟踪。(The digital phase-locked loop built under quartus can realize automatic frequency tracking.)

高级加密标准AES的FPGA实现，支持128，256密钥长度格式-Advanced Encryption Standard AES, FPGA implementation to support 128,256 key length format