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计数器的VHDL语言程序实现1
VHDL语言编写的计数器程序,实现1到9999计数,并动态扫描显示,带清零和暂停功能,课上作业自编程序-VHDL language of the counter program to achieve 1-9999 counts, and the dynamic scan showed, with Clear and suspension of functions, classes, on a self-compiled programs
- 2022-01-21 03:16:50下载
- 积分:1
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yy
说明: 使用XILINX公司提供的板子里面的FFT的IP核,很好用(XILINX board provided the use inside the FFT of the IP core, useful)
- 2010-09-19 01:54:07下载
- 积分:1
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HalfbandDec
基于FPGA开发的11阶半带升余弦FIR滤波器,用在阅读器基带滤波时的抽取滤波器使用,采用verilog语言实现。(Raised cosine FIR filter based FPGA development 11 order of half-band decimation filter used in reader baseband filtering, using verilog language implementation.)
- 2012-10-25 11:18:40下载
- 积分:1
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分数时延FIR
说明: 分数时延FIR滤波器FPGA设计的相关资料及软件无线电实验平台MFSS6842使用说明(Fractional delay FIR filter FPGA design related information and software radio experimental platform MFSS6842 instructions)
- 2019-11-18 22:45:35下载
- 积分:1
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NAND_flash_verilog_vhdl
很好的NAND Flash 硬件驱动语言,支持VHDL和verilog 语言方便移植,如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。(NAND Flash Controller Reference
This reference design is used to interface a NAND Flash device and provides a simple host end interface. The host
end interface of this design is user-configurable. It provides buffer select signal, buffer write enable signal, address
bus, data bus, error status signal, control and handshake signals for the user......)
- 2021-03-08 22:59:28下载
- 积分:1
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本文描述了fpga中的亚稳态时如何产生的,以及如何计算亚稳态的平均无故障时间。对了解亚稳态有帮助。...
本文描述了fpga中的亚稳态时如何产生的,以及如何计算亚稳态的平均无故障时间。对了解亚稳态有帮助。-This paper describes the sub-fpga how the steady state, as well as how to calculate the metastable MTBF. The understanding of metastable helpful.
- 2022-06-01 03:41:23下载
- 积分:1
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gtx_drp
高速串行设计FPGA-GTX IP设置生成drp模块,可动态配置速率2.4Gbps,1.2Gbps,0.6Gbps,自适应链接(High-speed serial design FPGA-GTX IP setting generation drp module, dynamically configurable rate 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link)
- 2021-01-19 22:38:43下载
- 积分:1
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m_xulie
在quaritusII的开发环境下,verilog语言编写的m序列发生器代码,这种算法简短而有效,非常实用。(In quaritusII development environment, verilog language of m sequence generator code, this algorithm brief but effective, very practical.)
- 2013-09-26 11:30:47下载
- 积分:1
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ahb_sramc_svtb
ahb总线Verilog代码及sv仿真文件(ahb bus Verilog code and sv simulation code)
- 2021-05-14 14:30:02下载
- 积分:1
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dianzhen
如果需要用verilog设计一项比较简单的功能,那么这个浅显易懂的程序能让你很快明白点阵的设计方法,尤其是对那些初学者(If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners)
- 2014-01-16 16:13:53下载
- 积分:1