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uart
it contains pdf file which has vhdl program of uart (universal asynchoronus receiver and transmitter). which very simple and easy to understand
- 2010-04-22 20:47:55下载
- 积分:1
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数字电子钟 此数字电子钟具有的功能包括: 1. 计时,时、分、秒显示; 2. 十二小时与二十四小时之间的转换; 3. 上下午显示; 4. 对时、分、秒的校时功能...
数字电子钟 此数字电子钟具有的功能包括: 1. 计时,时、分、秒显示; 2. 十二小时与二十四小时之间的转换; 3. 上下午显示; 4. 对时、分、秒的校时功能; 5. 跑表功能。-digital electronic clock this digital electronic clock with functions include : 1. Time, hours, minutes and seconds display; 2. 12 hours with 24 hours of conversion; 3. On the afternoon show; 4. Right hours, minutes, and seconds school function; 5. Stopwatch functions .
- 2022-05-09 07:56:06下载
- 积分:1
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ddr3_test
说明: 通过循环读写DDR3内存,了解其工作原理和DDR3控制器的写法,由于DDR3控制复杂,控制器的编写难度高,这里笔者介绍XILINX的MIG控制器情况下应用,是后续音频、视频等需要用到SDRAM实验的基础。(Through reading and writing DDR3 memory circularly, we can understand its working principle and the writing method of DDR3 controller. Because of the complexity of DDR3 control, it is difficult to write the controller. Here, the author introduces the application of Xilinx's MIG controller, which is the basis of SDRAM experiment for subsequent audio and video.)
- 2021-04-16 10:00:15下载
- 积分:1
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基于FPGA的交通控制器
设计一个由一条主干道和一条支干道的汇合点形成的十字交叉路口的交通灯控制器: 1) 主、支干道各设有3个方向的绿、黄、红指示灯(左转、直行和右转),每个行驶方向均配有时间显示数码管;2) 主干道处于常允许通行状态,而支干道有车来才允许通行(由外部信号通知)。3) 当主、支道均有车时,两者交替允许通行,主干道每次放行90s,支干道每次放行60s,在每次由亮绿灯变成亮红灯的转换过程中,要亮5s黄灯作为过渡,并进行减计时显示。
- 2022-02-26 08:00:04下载
- 积分:1
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Rotating coordinates high
高速计算机旋转坐标算法的硬件实现,用于快速傅里叶算法的核心单元-Rotating coordinates high-speed computer hardware algorithm for fast Fourier algorithm is the core unit
- 2022-02-16 05:47:02下载
- 积分:1
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标准的异步串口通讯设计程序――基于VHDL编程
标准的异步串口通讯设计程序――基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
- 2023-04-04 00:20:03下载
- 积分:1
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eeprom
I2C EEPROM 存取源碼, 通用ATMEL(I2C EEPROM read/write)
- 2012-09-19 19:59:12下载
- 积分:1
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SPI_UVM_VIP
说明: SPI协议的芯片验证VIP,用UVM搭建平台验证代码(Chip verification VIP of SPI protocol, build platform verification code with UVM)
- 2020-08-25 09:58:15下载
- 积分:1
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关于vhdl的一些例子
关于vhdl的一些例子-on some of the examples of VHDL
- 2022-01-28 04:13:20下载
- 积分:1
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static-timing-analyze
特权同学主讲的FPGA设计的时序约束专题(STA部分)(Speaker privileged classmates timing constraints for FPGA design topics (STA section))
- 2013-07-11 13:23:46下载
- 积分:1