数字电子钟 此数字电子钟具有的功能包括： 1. 计时，时、分、秒显示； 2. 十二小时与二十四小时之间的转换； 3. 上下午显示； 4. 对时、分、秒的校时功能...

EDA中很重要的小程序，保证按键可靠性，防止抖动误差信号产生，外部信号输入时必用此消抖函数-EDA very important small procedures to ensure that key reliability and prevent jitter error signal generated, the external input signal must use this function Consumers shiver

本文首先对多功能车辆总线的基本原理进行了简要的概述，接着对其实时协议进行了分析，然后对 MVB2 类设备控制器的功能及其功能模块的划分设计进行了详细的分析；最后对各功能模块进行了编程实现，并给出了仿真验证波形。(Firstly, the basic principle of the multifunction vehicle bus are briefly outlined, then analyze the real time protocol, then carried out a detailed analysis of the classification of the design function and the function module of the MVB2 device controller; finally, the function of each module of the program, and gives the simulation waveforms.)

xilinx Spartan 6 PCIE仿真教程，PIO方式，带有TLP包分析。(XILINX PCIE tutorial device spartan6 PCIE core version V2.4)

ecc椭圆算法RTL,verilog源代码经过验证，用于FPGA或者ASIC(ECC elliptic curve encryption algorithm for Verilog implementation)

SRIO接口物理层的实现代码，非常复杂，完全自己用verilog编写，支持5G速率，可以作为开发参考(SRIO interface implementation code, the physical is very complex, completely written in verilog, support rate of 5 g, will be helpful to the development)

OFDM系统新型RS编解码的verilogHDL设计，经测试误码率性能提高(OFDM system verilogHDL new RS codec design, improved bit error rate performance tested)

OQPSK在AWGN和频率选择性衰落信道中的仿真(OQPSK the AWGN and frequency selective fading channel simulation)

数字时钟管理器，xilinx公司开发板集成时钟，实现分频、倍频等功能。(Digital clock managers, xilinx development board integrated clock divider, multiplier, and other functions.)

通过verilog语言实现各种基本信号的调制解调过程，包括2psk,qpsk,ppm(Realize the modulation and demodulation process of various basic signals through verilog language, including 2psk, qpsk, ppm)

采用VHDL编写的步进电机控制程序-stepping motor controlling program written by VHDL