登录
首页 » VHDL » 用vhdl做的计算机组成原理课程设计的资料,实现加法运算,进行求和,仿真实例等资料!...

用vhdl做的计算机组成原理课程设计的资料,实现加法运算,进行求和,仿真实例等资料!...

于 2022-03-18 发布 文件大小:828.49 kB
0 170
下载积分: 2 下载次数: 1

代码说明:

用vhdl做的计算机组成原理课程设计的资料,实现加法运算,进行求和,仿真实例等资料!-Vhdl to do with the computer information on the composition of curriculum design principles to achieve the addition operation, a sum, simulation examples, etc.!

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • FM_T
    一个简单的FM调制模块,FM发射,用Verilog编写,基于Xilinx SPARTAN6 XC6LX9开发(A simple FM modulation modules for FM transmitter, using Verilog prepared, based on XILINX SPARTAN6 XC6LX9 Development)
    2020-11-25 20:19:32下载
    积分:1
  • Microcomputer-Principle
    该书介绍了英特尔的80x86CPU和一些串行通信芯片,以及汇编语言。(The book introduces the Intel 80x86CPU and some serial communications chip, and assembly language.)
    2013-07-27 14:55:25下载
    积分:1
  • s3esk_picoblaze_dac_control
    This is the Spartan 3E tutorial_02.
    2017-08-07 13:54:36下载
    积分:1
  • vivado 从此开始配套资料
    说明:  vivado入门使用介绍,初学者入门学习(vivado Instructional pdf)
    2020-07-04 18:00:01下载
    积分:1
  • The experimental results are used to prepare MOSIN6 is achieved Verilog HDL lang...
    有实验结果,用MOSIN6编写的,是Verilog HDL语言实现的. 练习三 利用条件语句实现计数分频时序电路 实验目的: 1. 掌握条件语句在简单时序模块设计中的使用; 2. 学习在Verilog模块中应用计数器; 3. 学习测试模块的编写、综合和不同层次的仿真。 练习四 阻塞赋值与非阻塞赋值的区别 实验目的: 1. 通过实验,掌握阻塞赋值与非阻塞赋值的概念和区别; 2. 了解阻塞赋值与非阻塞赋值的不同使用场合; 3. 学习测试模块的编写、综合和不同层次的仿真。 -The experimental results are used to prepare MOSIN6 is achieved Verilog HDL language. Practice the use of conditional statements to achieve the three sub-frequency timing circuit count experimental purposes: 1. Have conditional statements in the simple timing of the use of modular design 2. Learning modules in the Verilog Application of counter 3. to learn the preparation of the test module, integrated and different levels of simulation. Practicing the four blocking assignment with the distinction between non-blocking assignment experimental purposes: 1. Through experiments, hands blocking assignment with the concept of non-blocking assignment and distinction 2. Understanding of blocking and nonblocking assignment assignment usi
    2022-03-18 15:26:04下载
    积分:1
  • 基于Nios II开发板的VGA控制器的DE1控制…
    基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态,需要写一个Avalon 从端口响应CPU的控制信号,继而控制整个模块的运行,-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to write a response to Avalon from the CPU ports of the control signal, and then control the operation of the entire module,
    2023-07-07 19:50:03下载
    积分:1
  • 16位的移位寄存器,加上testbench,可以在modelsim里面运行~
    16位的移位寄存器,加上testbench,可以在modelsim里面运行~-16 of the shift register and testbench, modelsim the inside running ~
    2023-07-15 21:45:02下载
    积分:1
  • 基于NiosⅡ的2 de2_tvproject
    本演示使用VGA输出和DVD播放器播放视频和音频输入
    2022-01-26 03:44:01下载
    积分:1
  • cic_dec_8_three CIC 文件的VHDL
    cic_dec_8_three CIC 文件的VHDL-cic_dec_8_threeCIC documents VHDL
    2023-03-30 12:50:03下载
    积分:1
  • 可以用于按键去抖动的电路应用,采用vhdl编写
    可以用于按键去抖动的电路应用,采用vhdl编写-Button can be used to jitter circuit applications, the preparation of the use of VHDL
    2022-10-29 22:25:07下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载