携带向前看加法器

说明：  SSI转ABZ信号FPGA程序，测试完全可用(Function of SSI convert to ABZ signal,is available)

该源代码是RS（31，19）码的完整编译码程序，采用的是VerilogHDL语言，包含了RS码的编码和译码，这蛋疼的东西花费好多时间(The source code is RS (31,19) code complete encoding and decoding procedures, and spend a lot of time using is VerilogHDL language contains the encoding and decoding of RS codes, this egg pain)

H.264中二进制算术编码的硬件实现Binary arithmetic coding in H.264 hardware implementation(Binary arithmetic coding in H.264 hardware implementation)

verilog code for apb to ahb convert

this is "AND" gate implementation in VHDL

模拟示波器的现实程序，有x，y和光标。采用AD5440输出，现实效果很好。（示波器x-y方式）(Analog oscilloscope reality program, there are x, y and cursor. Using AD5440 output, real good results. (Xy oscilloscope mode))

使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.

FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING

endat 2.2 接口内核，发送命令至编码器或从编码器接收位置值(endat 2.2 interface cores, sending commands to the encoder or received the encoder position values)

Altera大学计划程序包，基于Nios II的源代码(Altera University program package, based on the Nios II source code)