-
自己编写的经过QuartusII验证的Verilog HDL程序,可以实现常见功能...
自己编写的经过QuartusII验证的Verilog HDL程序,可以实现常见功能-After QuartusII their written procedures for verification of the Verilog HDL, can achieve common features
- 2022-01-23 10:27:24下载
- 积分:1
-
fft
说明: 用VERILOG语言实现的频谱分析仪(FFT)(VERILOG language with the Spectrum Analyzer (FFT))
- 2009-08-09 16:30:23下载
- 积分:1
-
VHDL代码登记并决定如何登记
vhdl code for register and detemines how register
works -vhdl code for register and detemines how register
works
- 2022-06-18 22:43:42下载
- 积分:1
-
cloc
时钟在单片机中的应用,用于控制中断及显示程序(Clock in the MCU application, used to control interrupt and display program)
- 2013-06-04 15:27:35下载
- 积分:1
-
基于FPGA的1553B总线编码解码器的设计
基于FPGA的1553B总线编码解码器的设计-1553B Bus FPGA-based codec design
- 2022-02-25 23:58:17下载
- 积分:1
-
verilog基础练习,介绍怎样编写测试文件和仿真
verilog基础练习,介绍怎样编写测试文件和仿真-Verilog based on exercises, how to introduce the preparation of test documentation and simulation
- 2022-01-28 18:39:08下载
- 积分:1
-
2004 SNUG of systemverilog
2004 SNUG of systemverilog
- 2022-09-09 13:40:02下载
- 积分:1
-
PCIE
xilinx spartan6的pcie pio源代码(xilinx spartan6 pcie pio demo)
- 2020-11-25 14:39:32下载
- 积分:1
-
有关FIFO的代码
用VHDL语言写的代码 包括全局的输入时钟缓冲器来去抖动,块RAM模块65536*10,读数据,写数据,空标志信号的产生,满标志信号的产生,读写使能信号的产生七个模块!对各位有帮助噢!
- 2023-01-20 22:45:04下载
- 积分:1
-
responder3
说明: 基于VHDL的多路抢答器,用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)
- 2019-06-17 15:29:31下载
- 积分:1