FPGA realize for a good vga display routines, vhdl language.

学习FPGA的资料，基于FPGA的卡尔曼滤波器的设计与实现(Learning FPGA information, FPGA-based Design and Implementation of Kalman Filter)

这是自适应滤波器，使用verilog代码来编写的，已通过了仿真，效果很好。希望能给大家好好分享！(This adaptive filter verilog code to write, through a simulation, with good results. I hope to give a good share!)

使用verilog hdl语言编程正弦波信号，能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results )

说明：  VHDL BISS,SSI,ENDAT2.2, ENCODER

vhdl实现8255,可重用，ALATEK公司提供验证，用说明文档-achieve VHDL 8255, reusable, ALATEK companies to provide certification, with documentation

SystemVerilog For Design (Springer-2nd_Ed-2006)

Camera AR0134详细的寄存器配置，以及配置顺序，可以用来初始化摄像头(Camera AR0134 detailed register configuration sequence )

说明：  基于高清视频的3D人脸识别源代码，四万多行，经过FPGA实际验证，最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)

UG586 - Zynq-7000 All Programmable SoC and 7 Series Devices Memory Interface Solutions v2.3 User Guide ( ver2.3, 18511 KB )(UG586- Zynq-7000 All Programmable SoC and 7 Series Devices Memory Interface Solutions v2.3 User Guide ( ver2.3, 18511 KB ))

EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计(EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design)