a lot of examples and test code, useful for beginners, it is easy to get started

用VHDL写的交通灯控制源码，原创，希望对大家有所帮助-Use VHDL to write a traffic signal-controlled source, originality, and they hope to help everyone

说明：  PicoRV32 is a CPU core that implements the RISC-V RV32IMC Instruction Set. It can be configured as RV32E, RV32I, RV32IC, RV32IM, or RV32IMC core, and optionally contains a built-in interrupt controller. Tools (gcc, binutils, etc..) can be obtained via the RISC-V Website. The examples bundled with PicoRV32 expect various RV32 toolchains to be installed in /opt/riscv32i[m][c]. See the build instructions below for details.

说明：  基于OV7670采集，SDRAM缓存，sobel处理，VGA显示的工程，内有全部代码，基于QUARTUS开发板实现。 FPGA 边缘检测(Based on OV7670 acquisition, SDRAM cache, sobel processing, VGA display project, with all the code, based on QUARTUS development board. FPGA edge detection)

FPGA实现反正切功能，工程原件，包括测试文件，能够很好实现该功能(FPGA implements arctangent function, original engineering)

改自特权同学verilog语言写sdram测试程序；支持256M内存(verilog sdram )

说明：  难得的soc设计用的ddr3 verilog，可用于学习！！！！！有datasheet ，可仿真(soc ddr3 verilog for study !!)

说明：  matlab code for JTAG cable checking

自动计算fir滤波器系数的工具，不妨一试(Automatic calculation of filter coefficients fir tools, try)

把指定的噪声叠加到信号上去.有标准噪声库NOISEX-92，其中带有白噪声、办公室噪声、工厂噪声、汽车噪声、坦克噪声等等，在信号处理中往往需要把库中的噪声叠加到信号中去，而噪声的采样频率与纯信号的采样频率往往不一致，需要采样频率的校准。 (The specified noise superimposed to the signal up. Standard noise library NOISEX-92, with white noise, office noise, factory noise, car noise, tank noise in the signal processing often requires noise to be superimposed in the library The signal to noise of the sampling frequency and pure signal sampling frequency is often inconsistent sampling frequency of calibration.)

8051核的vhdl原代码。-8051 core VHDL source code.