实光电码盘的输出数据的四倍频，使码盘输出精度提高四倍。...

说明：  AMBA2.0标准的AHB2APb桥，代码通过验证(AMBA2.0 standard AHB2APb Bridge, through the verification code)

程序用VHDL实现： 利用一秒定时测量频率 并且显示，范围0~-VHDL 0~

基于FPGA的直接序列扩频发射机的设计与仿真。实验中以QuartusII 7.2 为设计和仿真工具， 各模块采用Verilog HDL设计并封装，顶层使用图形设计方式,最后得到的仿真结果使用Matlab描点来绘制出波形。 (FPGA-based direct sequence spread spectrum transmitter of the design and simulation. Experiment to QuartusII 7.2 for the design and simulation tools, the module using Verilog HDL to design and package, the top-level use of graphic design, and finally the simulation results obtained using the Matlab description points to draw waveforms.)

altera详细使用配置手册，有一定的参考价值，写的比较详细-altera in detail the use of manual configuration, has a certain reference value, a more detailed written

这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences

适用于FPGA的SOPC方面的元器件添加，如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT

FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation

LBM用于Poiseuille流初学者程序，直接反弹格式(LBM Poiseuille)

用verilog实现的UDP协议，包括arp，udp，ip分段协议等，对于想用FPGA实现TCP/IP协议的人来说，应该会起到一定的帮助作用(Implemented with verilog UDP protocols, including arp, udp, ip fragmentation protocol, etc., who want to achieve TCP/IP protocol with the FPGA people, should play a helpful role)

VHDL 基于cpld EPM570的DA转换代码(VHDL CPLD EPM570 the DA conversion code based on)