A brief introduction of direct digital frequency synthesis (DD S), the use of DD...

8位大小比较器的VHDL源代码，Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion

Clifford E. Cummings论文合集，其中关于FIFO的设计很经典(Clifford E. Cummings collection of papers, on the FIFO design classic)

说明：  在quartus上运行16QAM仿真，实现在modelsim上的波形仿真(Running 16QAM simulation on quartus)

乘法器功能 直接实现两个数字信号的相乘～-Multiplier features two digital signal direct implementation of the multiplication ~

Paint for SPARTAN 3E

控制电话信令 完成忙碌 等待 回铃音振铃等(Signaling complete control over telephone ring so busy waiting ringback tone)

半带滤波器，用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)

inter integrated circuit i2c protocol

VIVADO HLS IMAGE 使用文档(vivado image processing example text of zynq)

用verilog语言的实现FIFO存储器，以先进先出的方式处理数据(The FIFO memory is implemented in Verilog language, and data is processed in FIFO)