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MQTT服务器搭建教程
本教程为本地MQTT服务器搭建,搭建此本地MQTT服务器必须先为电脑配置java 环境,然后用CMD命令按步骤运行apache-apollo-1.7.1下相关exe搭建服务器管烨员:C: Windowssystem32 cmd.exe215/1/291:55example#215/1/2916:55ed hD: vapache-apo1lo-1.7.1 in >ddr卷是软件卷的序列号是FAD4418D: Mapache- apollo-1.7.1hin的目录E17/81421:4 d1r卷是软件卷的序列号是FAD4418D: pache-apo11o-1.71 bin roker in的目录E17/g81421:41dir驱动器卷是软件卷的序列号是FD4-418D:< apache-apo1lo-1.71 bin Broker in的目录217/981421:41apoIlo-broker run红框内第一行是监听,监听端口是,客服端链接时输入电脑的地址即可,本机可使用命令查询。绿框内为控制台地址,在浏览器输入可现实控制台界面。c管埠员: CAWindows system32 cmd.exe- apollo-broker run一巴回[9Gv[37ml∈[32mc[37 mApache Apo11a←[2mINFO i AyulINFo Starting store: leveldb store at D: apac he-apo1lo-1-7.1 in Nmybraker vdatMARN Using the pure java Leve lDB implementation which is still experimentalIf the NI version is not available for your platform, please switch to the BDBstoreinsteadhttp://activemg.apache.org/appllo/docunentation/user-manual.htmlNro I Accepting connections at: tcp://6.5.6.G:G1G1JNFO白 ccepting connect1 ons at:t1s:/.回,.日=6⊥614NFo Accepting connections at: us://0.0.4.2=61623/Fo Accepting connections at: uss://.0.6-G:61624INFOvirtual host startup is wait ing on store startupINFO i virtual host startup is no longer waiting- It waited a total of 1 seconNfoAdministrationinterfaceavailableat:https://127.0.0.1:61681/INFOAdministrat iun interface dudildlle at: htLp://1270-0-1:616808.用户名默认: admin,密码: password←C▲不安全p127.0.0.161681/ onsale/in dex. hlIIIApollo ConsoleogInUsernamePassward5控制台界面Apache Apollo -AntCA承我全琳低!1n(1h1 ronnie/nrf=hm匈☆Apollo ConsoleadminVirtual Hosts Connectors operat ng Ervironment ConfiguratioVirtual Host: mybrcke-ETAIL5ueues Topics Durable SubsSince:2017//5下午10:A0Name: nomcCrcaHostNo Queues have been created yet.STORE STATUS
- 2021-05-06下载
- 积分:1
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船舶回转试验及PID航向保持控制系统仿真实验
该实验报告结合船舶参数,利用Simulink环境建立船舶的Nomoto数学模型,首先对其进行回转试验,然后为其设计一个PID控制器使其保持正东航向,最后给船舶加入干扰测试其性能。
- 2020-11-28下载
- 积分:1
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winform 很好用的分页控件带SQL数据库
winform 很好用的分页控件带SQL数据库
- 2020-12-06下载
- 积分:1
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matlab ode45使用方法
ode45 matlab使用方法ode45 matlab
- 2020-12-03下载
- 积分:1
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模糊PID轨迹跟踪
基于模糊PID的轨迹跟踪,可直接在matlab上运行。 基于模糊PID的轨迹跟踪,可直接在matlab上运行。 基于模糊PID的轨迹跟踪,可直接在matlab上运行。 基于模糊PID的轨迹跟踪,可直接在matlab上运行。 基于模糊PID的轨迹跟踪,可直接在matlab上运行。
- 2020-11-28下载
- 积分:1
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qt3电子点菜系统源码.rar
【实例简介】qt3电子点菜系统源码,qt3电子点菜系统源码,qt3电子点菜系统源码。
- 2021-11-30 00:55:23下载
- 积分:1
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蓝牙系列书籍:蓝牙学习丛书(蓝牙4.0BLE开发完全手册+蓝牙核心技术及应用+蓝牙协议的学习+蓝牙协议及其源代码分析)
蓝牙系列书籍:蓝牙学习丛书(蓝牙4.0BLE开发完全手册+蓝牙核心技术及应用+蓝牙协议的学习+蓝牙协议及其源代码分析)
- 2020-12-06下载
- 积分:1
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基于MATLAB语音信号去白噪声、高斯白噪声分析的源程序
基于MATLAB语音信号去白噪声、高斯白噪声分析的源程序,将白噪声中的1/10改成1/50就可滤除白噪声,高斯白噪声的就不用改了!
- 2020-12-05下载
- 积分:1
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Web安全培训ppt(适合初学者)
Web安全学习大纲一、Web安全系列之基础1、Web安全基础概念(1天)互联网本来是安全的,自从有了研究安全的人之后,互联网就变的不安全了。 2、web面临的主要安全问题(2天) 客户端:移动APP漏洞、浏览器劫持、篡改服务器:DDos攻击、CC攻击、黑客入侵、业务欺诈、恶意内容3、常用渗透手段(3天)信息搜集:域名、IP、服务器信息、CDN、子域名、GOOGLE HACKING扫描器扫描:Nmap、AWVS、Burp Suite、在线扫描器权限提升权限维持二、Web安全系列之漏洞1、漏洞产生原因(1天)漏洞就是软件设计时存在的缺陷,安全漏洞就是软件缺陷具有
- 2020-12-05下载
- 积分:1
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matlab 2014b HDL Coder Users Guide
Matlab 官方有关于HDL coder开发的详细技术文档, HDL Coder可以把Simulink模型、MATLAB代码和Stateflow框图生成位真、周期精确、可综合的Verilog和VHDL代码,很适合用于FPGA/ASCI的快速开发,里面还有大量的例程等等ContentsHDL Code generation from MATLaBMATLAB Algorithm DesignData Types and scope1-2Supported data TUsuppyted data type1-3Scope for variables1-3Operators1-4Arithmetic operate1-4Relational operators1-4ogical Operators1-5Control flow statements1-6Vector Function Limitations related to Control1-7PersistentⅤ ariables1-8Persistent Array variables1-10Complex data Type Support1-11Declaring complex signaIs1-11Conversion Between Complex and real signals1-12Support for vectors of Complex Numb1-12ystem Objects1-14Why use System objects?1-14Predefined System Object1-14User-Defined System ob1-14Limitations of HDL Code Generation for SystemObjects1-15System object Examples for HDL Code Generation.. 1-16Predefined System Objects Supported for HDL CodeGeneration1-17Load constants from a mat-file1-18Generate Code for User-Defined System Objects1-19How To Create a User-Defined System object1-1User-Defined System object Example1-19Map Matrices to ROM1-22Fixed-Point bitwise Functions1-231-23Bitwise Functions Supported for HDl Code Generation 1-23Fixed-Point Run-Time Library functions1-29Fixed-Point function limitations1-33Model State with Persistent variables and SysteObjects1-34Bit Shifting and bit rotation1-8Bit Slicing and Bit Concatenation1-41Guidelines for Efficient hdL code1-43MATLAB Design Requirements for HDL CodeGeneration1-44What is a matlab test bench?1-45MATLAB Test Bench Requirements and bestractices1-46MATLAB Test Bench requirements1-46MATLAB Test bench best practices1-46ContentsMATLAB Best Practices and Design Patterns forHDL Code generation2Model a counter for hdl code generation2-2MATLAB Counter2-2MATLAB Code for the counter2-3Best Practices in this Example2-4Model a state machine for HDL Code Generation2-5MATLAB State machinesMATLAB Code for the Mealy State MachineMATLAB Code for the moore state machine2-7Best practic2-9Generate hardware Instances For local functions2-10MATLAB Local functions2-10MATLAB Code for mlhdlc two counters. m2-10Implement RAM USing MATLAB Code2-13Implementation of RAM2-13Implement RAM Using a Persistent Array or Systemobject Properties2-13Implement RAM Using hdl. RAM2-14For-Loop best Practices for HDL Code generation2-16MATLAB Loops2-16Monotonically Increasing Loop Counters2-16Persistent Variables in Loops2-17Persistent Arrays in Loops2-17Fixed-Point Conversion3Floating-Point to Fixed-Point Conversion3-2Fixed-Point Type Conversion and Refinement3-16Working with Generated Fixed-Point Files3-26Specify Type Proposal Options3-33Log Data for Histogram3-37Automated Fixed-Point Conversion3-40License Requirements3-40Automated Fixed-Point Conversion Capabilities3-40Code Coverage3-42Proposing Data Types3-45Locking Proposed Data Types3-47Viewing functions3-47lew1ariables3-48Istogram ...3-54Function Replacements3-56Validating Types3-57g Numerics3-57Detecting Overflows3-57Custom plot functions3-59Visualize Differences Between Floating-Point and Fixed-Point results3-61Inspecting Data Using the Simulation Data Inspector 3-67What Is the Simulation Data Inspecto3-67Import Logged Data3-67Export Logged data3-67Group signals3-67Run options3-68Create Report3-68Comparison Options3-68Enabling Plotting Using the Simulation Data Inspector 3-68Save and Load simulation Data Inspector Sessions3-68Enable Plotting Using the Simulation Data Inspector 3-70From the UI3-70From the Command Line3-70Replacing Functions Using Lookup TableApproximations·3-72Replace a custom function with a lookup Table3-73From the UI3-73i ContentsFrom the Command line3-81Replace the exp Function with a Lookup Table3-84From the ui3-84From the Command line3-92Data Type Issues in Generated Code3-94Enable the highlight Option in a MaTLAB CoderProject3-94Enable the Highlight Option at the Command Line... 3-94Stowaway doubles3-94Stowaway singles3-94Expensive Fixed-Point operations3-94Code GenerationCreate and set Up Your Project4-2Create a New Project4-2Open an Existing ProjectAdd Files to the project4-4Primary Function Input Specification4-6When to Specify Input Properties4-6Why You must Specify Input Properties4-6Properties to Specify4-6Rules for Specifying Properties of Primary Inputs4-8Methods for Defining Properties of Primary Inputs4-8Basic hdl code generation with the workflowAdvisor4-10HDL Code Generation from System Objects4-14Generate Instantiable code for functions4-19How to generate Instantiable Code for Functions4-19Generate Code Inline for Specific Functions4-19Limitations for instantiable code generation forFunctions4-19Integrate Custom HDL Code Into MATLAB Design.. 4-21Define the hdl. Black Box System object4-21Use System object In MATLAB Design Function4-23Generate HDL Code4-23limitations for hdl. black box4-26Enable matLab function block generation4-27Requirements for MaTLAB Function Block Generation 4-27Enable matlab function block generation4-27Results of matlab function block generation4-27System Design with HDL Code Generation fromMATLAB and simulink4-28Generate Xilinx System Generator Black Box Block4-32Requirements for System Generator Black Box BlockGeneration4-32Enable System Generator black Box block GeResults of System Generator Black Box Bloc neration4-32Generation4-33Generate Xilinx System Generator for DsP black boxfrom MATLAB HDL Design4-34Generate HDL Code from MATLAB Code Using theCommand line interface4-40Specify the Clock Enable rate4-45Why specify the clock Enable rate?4-45How to Specify the clock Enable rate4-45Specify Test Bench Clock Enable Toggle rate4-47When to Specify Test Bench Clock Enable Toggle rate4-47How to Specify Test Bench Clock Enable Toggle rate4-47Generate an HDL Coding Standard report fromMATLAB4-49Using the hdl Workflow advisor4-49Using the Command Line4-51Generate an HDL Lint Tool script4-53How To generate an hdl lint Tool Script4-53ContentsGenerate a Board-Independent Ip core from MATLAB 4-55Generate a board-Independent Ip core4-55Requirements and Limitations for IP Core generation4-57Minimize clock enables4-58Using the GUi4-59Using the Command Line4-59Limitations4-59VerificationVerify Code with HDL Test Bench5-2Generate Test bench with file i/oWhen to Use file i/o In Test bench5-5How Test bench generation with file i/o works5-5Test Bench Data files5-5How to generate Test bench with file i/o5-6Limitations When Using File 1/0 In Test Bench5-6DeploymentGenerate Synthesis Scripts6-2Optimization7RAM Mapping7-2Map persistent Arrays and dsp. Delay to RAM7-3How To Enable RaM Mapping7-3RAM Mapping requirements for Persistent Arrays andSystem object PropertiesRAM Mapping Requirements for dsp. Delay Systemob7-6RAM Mapping Comparison for MATLAB Code7-8Pipelining7-9Port registers7-9Input and Output Pipeline registers7-9Variable pipelining7-9Register Inputs and Outputs7-10Insert Input and Output Pipeline registers7-11Distributed Pipelining7-12What is Distributed Pipelin7-12Benefits and Costs of Distributed pipelining7-12Selected Bibliograph7-12Pipeline matlab variables7-13Using the hdl Workflow Advisor7-13Using the Command Line Interface7-13Limitations of MatlAB Variable Pipelining7-13Optimize MatLAb loops7-15oop Streaming7-15Loop unrolling7-15How to Optimize maTLaB loops7-15Limitations for MaTLAB Loop Optimization7-16Constant Multiplier optimization7-17Specify constant multiplier optimization7-19Distributed Pipelining for Clock Speed Optimization7-20Map Matrices to Block RAMs to Reduce Area7-27Resource Sharing of Multipliers to Reduce Area7-32Loop streaming to Reduce Area7-41Contents
- 2020-12-10下载
- 积分:1