基于模糊算法的移动机器人路径规划
一种基于模糊算法的移动机器人路径规划策略. 利用超声波传感器对环境进行探测, 得到关于障碍物和目标的信息. 运用模糊推理将障碍位置信息与目标位置信息模糊化,建立模糊规则并解模糊最终使机器人可以很好的避障,从而实现了移动机器人的路径规划。第4期陈卫东:基于模糊算法的移动机器人路径规划按照同样的方法,可以建立起多种条件下的控制规则的合成隶属度结果规则.类似于这样的控制规则可归纳总结为很多条.在模糊控制规则的制定上采用基于控制器行为特性的方NB NSPS PBNBSPS PBA0.7式,将动作分为若干基本行为,复杂的行为可由几个简0.303X)嬷单行为按次序构成,可简化模糊控制规则的确定,并可10-5减少模糊控制规则的数目,避开被控对象的特性建模cmis-10-510 cm/s(a)左轮加速度b)右轮加速度3.4模糊推理图8左右轮合成隶属度函数模糊推理是模糊控制器的核心,它具有模拟人的3.5解模糊基于模糊概念的推理能力,该推理过程是基于模糊逻通过模糊推理得到的结果是一个模糊集合.但在辑中的蕴含关系及推理规则来进行的由模糊规则推实际模糊控制中,必须要有一个确定值才能控制或驱理出输岀量的隶属度根据 Mamdani模糊推理方法求取动执行机构.将模糊推理结果转化为精确值的过程称模糊关系矩阵0为解模糊.所以,解模糊的作用是将模糊集合映射为为了说明模糊推理控制器的工作过程,这里以机个确定的点.也就是把上面推理合成得到的左右轮加器人在FD=105cm;ID=117cm;RD=40cm;θ=45deg;υ速度模糊集合转化为一个精确值来控制机器人的运=3.5cm/s的状态为例来说明推理决策的过程.査询数动解模糊方法的选择与隶属度函数形状的选择、推理据库中的规则,此状态下的模糊规则为表格中的第5、方法的选择相关. MATLAB提供5种解模糊方法:面积6、11和12.由模糊规则的推理与合成(取极小,取极大)重心法、面积等分法、平均最大隶属度法、最大隶属度得到输出的隶属度如下取小法和最大隶属度取大法.本文仿真采用的重心第五个规则推理结果法.这种方法也称为质心法或面积中心法,是所有解模糊化方法中最为合理、最流行和引人关注的方法.该方NB NS 1Z PS PBNB NS 1ZPSPB法的数学表达式是0.3031p1(a)d(a1)10 cm/s2左轮加速度2)ALaI(a)左轮加速度b)右轮加速度图4规则5推理的左右轮合成隶属度函数第六规则推理结果:ar uR(ar)d(a,)右轮加速度=(3)NB NS IZ PS PBNB NSPS PB式中,表示输出模糊子集所有元素的隶属度值在连续0.20.2论域上的代数积分,而加速度的取值是表示其左右两0m/s2-10-5cn边的面积为相等.该方法计算复杂,但它包含了输出模(a)左轮加速度(b)右轮加速度图5规则6推理的左右轮合成隶属度函数糊子集所有元素的信息,也较精确.采用重心法将模糊第十一规则推理结果量转换成清晰量,再经过线性尺度变换为实际输入给直流电机的控制量控制移动机器人的移动NB NS 1Z PS PBNB NS IZ PS PB0.74仿真实验及结果分析为了验证本文提出的模糊控制方法的可行性,在10-5105cm/s210-5cnMatlab中利用 Simulink建立系统仿真模型,对控制规则(a)左轮加速度(b)右轮加速度图6规则11推理的左右轮合成隶属度函数进行了仿真,假设移动机器人的行驶速度为0.6m/s,使第十二规则推理结果:用 Fuzzy logic工具箱软件对模糊算法进行了仿真.在仿n真过程中,起点和终点的位置可以任意设置,障碍物的NB NS IZ PS PBPS大小、形状和位置也可以任意设置,这样就可以在任意环境下检验算法的正确性和可靠性0.20.2图9为当起点为(0,0),目标点为(9,9),在障碍物100cm/s2-10-5cmls存在时模糊算法和势场法的路径规划仿真.由图我们(a)左轮加速度(b)右轮加速度图7规则12推理的左右轮合成隶属度函数可以看出,模糊算法比势场法规划的路径更优.其工作4电子学报011年代价更小,行走的路径也更短由于速度的控制,比文5结论献[12]中只对转向角进行控制节省大量时间移动机器人由于传感器的限制以及周围环境的不移动机器人路径规划仿真确定性,很难预先对机器人的移动路径进行规划.本文目标点釆用了的模糊控制算法对移动机器人进行控制.这种8算法对移动机器人的运行环境几乎没有什么限制,它能在情况很复杂的未知环境里运行.对障碍物的形状及其个数也没有什么约束.并可避开传统算法中存在障碍物的对移动机器人的定位精度敏感,对环境信息依赖性强等缺点.并且通过对速度的控制使机器人比以前只2模糊算法路径dd对转角控制进行路径规划节省时间,具有很强的时效性.从实验中的移动轨迹可以看出,移动机器人的行为0起始点势场法路径表现出很好的一致性、连续性和稳定性参考文献10x/m图9模糊算法和势场法的仿真对比图[1]李磊,叶涛,谭民,等.移动机器人技术研究现状与未来在相同的环境下用A算法和模糊算法也进行了J].机器人,2002,24(5):475-480仿真对比,仿真路径图如图10.应用两种算法获得的最Li Lei, Ye Tao, Tan Ming. Present state and future development优路径如图所示.其中,A*算法计算量较大,并且Aof mobile robot technology research [J. Robot. 2002, 24(5)算法只能在环境信息已知的情况下找到路径而不适合475-480.(in Chinese)部分环境信息已知的情况,而且很不适合动态环境的2 Pradhan, DR Parhi, A K Panda. Potential feld method to路径规划.模糊算法显然比A算法规划的路径更优,navigate several mobile robots[ J. Applied Intelligence, 2006(25):321-333并且能够实现移动机器人的实时避障3]郝宗波,洪炳熔.未知环境下基于传感器的移动机器人路移动机器人路径规划仿真径规划[J].电子学报,2006,34(5):953-956目标点Hao Zong-bo, Hong Bing-rong Sensor-based path planning for8mobile robot in unknown environment[J. Acta ElectronicaSinica, 2006, 34(5): 953-956(in Chinese)64]周兰凤,洪炳熔.用基于知识的遗传算法实现移动机器人障碍物路径规划[J].电子学报,2006,34(5):911-914Zhou Lan-feng; Hong Bing-rong. a knowledge based geneticalgorithm for path planning of a mobile robot[ J. Acta Elec2模糊算法路径tronic Sinica, 2006, 34 (5): 911-914(in Chinese0[5]高庆吉,雷亚莉,胡丹丹,等.基于自适应感知复位算法的起始点A*算法路径移动机器人定位[J.电子学报,2007,35(11):2166-217110Gao Qing-ji, Lei Ya-li, Hu Dan-dan. A robot localizationr/m图10模糊算法和A*算法的仿真对比图method based on adaptive sensor resetting algorithm[ J].Acta对比实验表明,模糊算法不但优于人工势场法,也Electronica Sinica, 2007, 35(11): 2166-2171.(in Chinese)优于A算法模糊算法大大优化移动机器人的路径规6TLLe,C-JWu. Fuzzy motion planning of mobile robots in划,是一种很智能的路径规划方法.模糊算法仿真成功unknown environments[J]. Journal of Intelligent and RoboticSystems,2003,37(2):177-191(下转第980页)证明使用模糊控制进行路径规划时对移动机器人的运行环境几乎没有什么限制,它能在未知环境里运行.对作者简介障碍物的形状及其个数也没有什么约東.从仿真实验陈卫东男,1972年生于吉林长春,教授,主要研究方向为机器中的移动轨迹可以看出,移动机器人的行为表现出比人控制,智能算法及其应用,图像处理等较好的一致性、连续性和稳定性.采用模糊控制算法避E-mail:wdchen@ysu.edu.cn开了传统算法中存在的对移动机器人的定位精度敏朱奇光男,1978年生于浙江宁波,讲师,博士研究生,主要研究感、对环境的信息依赖性强等缺点方向为机器人控制,智能算法及其应用第4期陈卫东:基于模糊算法的移动机器人路径规划
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MicroElectronic Circuit Design
微电子电路设计第五版,Richard C. Jaeger, Traveis N. Blalock编著。FIETH EDITIONMICROELECTRONICHM-M- CIRCUIT DESIGNRICHARD C. JAEGERAuburn UniversityTRAVIS N. BLALOCKUniversity of VirginiaMcGrawEducationGrawEducationMICROELECTRONIC CIRCUIT DESIGN. FIFTH EDITIOPublished by McGraw-Hill Education, 2 Penn Plaza, New York, NY 10121 CopyrightC 2016 by McGraw-Hill EducationAll rights reserved. Printed in the United States of America. Previous editions 2011, 2008, and 2004. No part of thispublication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system,without the prior written consent of McGraw-Hill Education, including, but not limited to, in any network or otherelectronic storage or transmission, or broadcast for distance learninSome ancillaries, including electronic and print components, may not be available to customers outside the United StatesThis book is printed on acid-free pape1234567890DOw/DOw1098765ISBN978-0-07-352960-8MHID0-07-352960-5sident Products markets Kurt LVice President, General Manager, Products Markets: Marty Langece President, Content Design Delivery: Kimberly Meriwether DavidManaging director: Thomas TimpGlobal Publisher Raghu srinivasanDirector. Prodrelopment: RoDirector, Digital Content Development: Thomas Scaife, Ph DProduct develoVincent brashMarketing manager: Nick Mc faddenDirector, Content Design Delivery: Linda avenariusProgram meSchillingContent Project Managers: Jane Mohr, Tammy Juran, and Sandra M. SchneeBuyer: Jennifer PickelDesign: Studio Montage, St Louis, MOContent Licensing Specialist: DeAnna DausenerCompositor: MPS LimitedPrinter.R. DonnellAll credits appearing on page or at the end of the book are considered to be an extension of the copyright pageLibrary of Congress Cataloging-in-Publication DataJaeger. Richard cMicroelectronic circuit design/Richard C. Jaeger, Auburn University,Travis N. Blalock, University of Virginia. --Fifth editionpages cmIncludes bibliographical references and indexISBN978-0-07-352960-8(alk. paper)-ISBN0-07-338045-8(alk. paper)d 1. Integrated circuits--Design and construction. 2. Semiconductors--Design and construction. 3. Electronic circuitesign. I. Blalock, Travis N. Il. TitleTK7874.J3332015621.3815-dc232014040020The Internet addresses listed in the text were accurate at the time of publication. The inclusion of a website does not indicatean endorsement by the authors or McGraw-Hill Education, and McGraw-Hill Education does not guarantee the accuracy ofthe information presented at these siteswww.mhhe.comTOTo Joan, my loving wife and life long partnerRichard C. JaegerIn memory of my father, Professor Theron vaughnBlalock, an inspiration to me and to the countlessstudents whom he mentored both in electronicdesign and in life.Travis n blalockBRIEF CONTENTSPreface xxChapter-by-Chapter Summary XXV12 Operational Amplifier Applications 685PART ONE13 Small-Signal Modeling and LinearSOLID-STATE ELECTRONICS AND DEVICESAmplification 77014 Single-Transistor Amplifiers 8411 Introduction to Electronics 32 Solid-State Electronics 4115 Differential Amplifiers and Operational Amplifier3 Solid-state Diodes and Diode circuits 72Design 9524 Field-Effect Transistors 14416 Analog Integrated Circuit Design Techniques 10315 Bipolar Junction Transistors 21517 Amplifier Frequency Response 111318 Transistor Feedback Amplifiers andPART TWOOscillators 1217DIGITAL ELECTRONICSAPPENDICES6 Introduction to Digital Electronics 2837 Complementary MOS (CMOS) Logic Design 359A Standard Discrete Component Values 12918 MOS Memory Circuits 414B Solid-State Device Models and sPIce simulationParameters 12949 Bipolar Logic Circuits 455C TWo-Port Review 1299PART THREIndex 1303ANALOG ELECTRONICS10 Analog Systems and Ideal OperationalAmplifiers 51711 Nonideal Operational Amplifiers and FeedbackAmplifier Stability 587CONTENTSPreface xxCHAPTER 2Chapter-by-Chapter Summary XXVSOLID-STATE ELECTRONICS 41PART ONE2.1 Solid-State Electronic materials 432.2 Covalent bond model 44SOLID-STATE ELECTRONICS2.3 Drift Currents and mobility inAND DEVICES 1Semiconductors 472.3.1 Drift Currents 47CHAPTER 12.3.2 Mobility 48INTRODUCTION TO ELECTRONICS 32.3.3 Velocity Saturation 482.4 Resistivity of Intrinsic Silicon 491.1 A Brief History of Electronics: From2.5 Impurities in Semiconductors 50Vacuum Tubes to Giga-Scale Integration 52.5.1 Donor Impurities in silicon 511.2 Classification of Electronic Signals 82.5.2 Acceptor Impurities in Silicon 511.2.1 Digital signals 92.6 Electron and hole concentrations in1.2.2 Analog Signals 9Doped semiconductors 511.2.3 A/D and D/A Converters--Bridging2.6.1Type Material (ND >NA)52the analog and Digital2.6.2 p-Type Material (N,A>ND)53Domains 102.7 Mobility and Resistivity in Doped1.3 Notational conventions 12Semiconductors 541.4 Problem-Solving Approach 132.8 Diffusion currents 581.5 Important Concepts from Circuit2. 9 Total Current 59Theory 152.10 Energy Band Model 601.5.1 Voltage and current Division 152.10.1 Electron-Hole pair generation in1.5.2 Thevenin and norton circuitan intrinsic semiconductor 60Representations 162.10.2 Energy Band Model for a Doped1.6 Frequency Spectrum of ElectronicSemiconductor 61Signals 212.10.3 Compensated semiconductors 611.7 Amplifiers 222.11 Overview of Integrated circuit1.7.1 Ideal operational amplifiers 23Fabrication 631.7.2 Amplifier Frequency Response 25Summary 661.8 Element Variations in Circuit Design 26Key Terms 671.8.1 Mathematical modeling ofReference 68Tolerances 26Additional Reading 681.8.2 Worst-Case Analysis 27Problems 688.3 Monte Carlo analysis 291.8.4 Temperature Coefficients 32CHAPTER 31.9 Numeric Precision 34SOLID-STATE DIODES AND DIODE CIRCUITS 72Summary 34Key Terms 353.1 The pn Junction Diode 73References 363.1.1 pn Junction Electrostatics 73Additional Reading 363.1.2 nternal diode currents 77Problems 363.2 The i-v Characteristics of the diode 78VIllContents3.3 The Diode Equation: A Mathematica3.15 Full-Wave Bridge Rectification 123Model for the diode 803.16 Rectifier Comparison and Design3.4 Diode Characteristics under reverse, ZeroTradeoffs 124and forward bias 833.17 Dynamic Switching Behavior of the Diode 1283.4.1 Reverse bias 833.18 Photo diodes, solar cells, and3. 4.2 Zero bias 83Light-Emitting Diodes 1293.4.3 Forward Bias 843.18.1 Photo diodes and3.5 Diode Temperature Coefficient 86Photodetectors 1293.6 Diodes under reverse bias 863.18.2 Power Generation from Solar Cells 1303.6.1 Saturation Current in real3.18. 3 Light-Emitting Diodes(LEDs)13Diodes 87Summary 1323.6.2 Reverse Breakdown 89Key Terms 1333.6.3 Diode model for the breakdownReference 134Region 90Additional Reading 1343.7 pn Junction Capacitance 90Problems 1343.7.1 Reverse bias 903.7.2 Forward Bias 91CHAPTER 43.8 Schottky Barrier Diode 933.9 Diode SPICE Model and layout 93FIELD-EFFECT TRANSISTORS 1443.9.1 Diode Layout 944.1 Characteristics of the MOS Capacitor 1453.10 Diode Circuit Analysis 954.1.1 Accumulation Region 1463.10.1 Load-Line Analysis 964.1.2 Depletion Region 1473.10.2 Analysis Using the Mathematical4.1.3 Inversion Region 147Model for the diode 974.2 The nmos transistor 1473.10.3 The Ideal diode model 1014.2.1 Qualitative i-v Behavior of the3.10.4 Constant Voltage Drop Model 103NMOS Transistor 1483.10.5 Model Comparison and4.2.2 Triode Region Characteristics ofDiscussion 104the nmos transistor 1493.11 Multiple-Diode Circuits 1054.2.3 On Resistance 1523.12 Analysis of Diodes Operating in the4.2.4 Transconductance 153Breakdown Region 1084.2.5 Saturation of the i-v3.12.1 Load-Line Analysis 108Characteristics 1543.12.2 Analysis with the Piecewise4.2.6 Mathematical model in theLinear model 108Saturation (Pinch-off)3.12.3 Voltage regulation 109Region 1553.12.4 Analysis Including Zener4.2.7 Transconductance in saturation 156Resistance 1104.2.8 Channel-Length Modulation 1563.12.5 Line and Load Regulation 1114.2.9 Transfer characteristics and3.13 Half-Wave Rectifier Circuits 112Depletion-Mode MosFETs 1573.13.1 Half-Wave Rectifier with resistor4.2.10 Body Effect or SubstrateLoad 112Sensitivity 1593.13.2 Rectifier Filter Capacitor 1134.3 PMOS Transistors 1603.13.3 Half-Wave Rectifier with rc load 1144.4 MOSFET Circuit Symbols 1623. 13.4 Ripple Voltage and Conduction4.5 Capacitances in MOS Transistors 165Interval 1154.5.1 NMOs Transistor Capacitances in3.13.5 Diode Current 117the Triode region 1653.13.6 Surge Current 1194.5.2 Capacitances in the Saturation3.13.7 Peak-Inverse-Voltage(PlV)Rating 119Region 1663.13.8 Diode Power Dissipation 1194.5.3 Capacitances in Cutoff 1663.13.9 Half-Wave Rectifier with Negative4.6 MOSFET Modeling in SPICE 167Output Voltage 1204.7 MOS Transistor Scaling 1683.14 Full-Wave Rectifier Circuits 1224.7.1 Drain Current 1693. 14.1 Full-Wave Rectifier with Negative4.7.2 Gate Capacitance 169Output Voltage 1234.7.3 Circuit and power densities 169ContentsIX4.7.4 Power-Delay Product 1705.3 The pnp Transistor 2234.7.5 Cutoff Frequency 1705.4 Equivalent Circuit Representations for the4.7.6 High Field Limitations 171Transport Models 2254.7.7 The unified mos transistor model5.5 The i-v Characteristics of the bipolarIncluding High Field Limitations 172Transistor 2264.7.8 Subthreshold conduction 1735.5.1 Output Characteristics 2264.8 MOs Transistor Fabrication and layout5.5.2 Transfer characteristics 227Design Rules 1745.6 The Operating Regions of the Bipolar4.8.1 Minimum Feature size andTransistor 227Alignment Tolerance 1745.7 Transport Model Simplifications 2284.8.2 Mos Transistor Layout 1745.7.1 Simplified Model for the Cutoff4.9 Biasing the NMOS Field-EffectRegion 229Transistor 1785.7.2 Model Simplifications for the4.9.1 Why Do We Need Bias? 178Forward-Active Region 2314.9.2 Four-Resistor Biasing 1805.7.3 Diodes in Bipolar Integrated4.9.3 Constant Gate-Source VoltageCircuits 237Bias 1845.7.4 Simplified Model for the4.9.4 Graphical analysis for theReverse-Active Region 238Q-Point 1845.7.5 Modeling Operation in the4.9.5 Analysis Including Body Effect 184Saturation Region 2404.9.6 Analysis Using the Unified5.8 Nonideal Behavior of the bipolarModel 187Transistor 2434.10 Biasing the PMos Field-Effect Transistor 1885.8.1 Junction Breakdown Voltages 2444.11 The junction Field-Effect Transistor5.8.2 Minority-Carrier Transport in theUFET190Base Region 2444.11.1 The JFET With Bias Applied 195.8.3 Base Transit time 2454.11.2 JFET Channel with Drain-Source5.8.4 Diffusion Capacitance 247Bias 1935.8.5 Frequency Dependence of the4.11.3 n-Channel jfet i-v Characteristics 193Common-Emitter current gain 2484.11.4 The p-Channel JFET 1955.8.6 The Early Effect and Early4.11.5 Circuit Symbols and JFET ModelVoltage 248Summary 1955.8.7 Modeling the Early Effect 2494.11.6 JFET Capacitances 1965.8.8 Origin of the Early Effect 2494.12 JFET Modeling in Spice 1965.9 Transconductance 2504.13 Biasing the JFET and Depletion-Mode5.10 Bipolar Technology and sPiCe Model 251MOSFET 1975.10.1 Qualitative Description 251Summary 2005.10.2 SPICE Model Equations 252Key Terms 2025.10.3 High-Performance BipolarReferences 202Transistors 253Problems 2035.11 Practical bias circuits for the bjt 2545.11.1 Four-Resistor bias network 256CHAPTER 55.11.2 Design Objectives for theBIPOLAR JUNCTION TRANSISTORS 215Four-Resistor bias network 2585.11.3 terative Analysis of the5.1 Physical Structure of the BipolarFour-Resistor bias circuit 262Transistor 2165.12 Tolerances in bias circuits 2625.2 The Transport Model for the npn5. 12.1 Worst-Case Analysis 263Transistor 2175. 12.2 Monte Carlo Analysis 2655.2.1 Forward Characteristics 218Summary 2685.2.2 Reverse Characteristics 220Key Terms 2705.2.3 The Complete Transport ModelReferences 270Equations for Arbitrary BiasProblems 271Conditions 221
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