程序采用VHDL：频率合成DDS主要调用LPM，

VHDL的基本程序，可以用来驱动键盘，功能强大，虽然和基础-VHDL

VHDL数字系统设计和工程实践1，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.

基于VHDL的I2C程序0002,很不错的论文及程序，，大家快下啊-based on the I2C procedures VHDL 0002, a very good paper and procedures, we quickly under ah

以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))

计算机组成原理的CPU实验，基于quartus平台(CPU experiment of computer organization principle, based on quartus platform)

嵌入式的LCD的图片显示程序，是LCD最好的资料。(Embedded LCD picture display program is the best LCD data.)

这个代码主要实现了基于VHDL的关于TV方面的功能。(This code is the main achievement of the VHDL about aspects of the function based on TV.)

电子时钟VHDL程序与仿真的vhdl源代码-Electronic clock and simulation of VHDL procedures vhdl source code

xilinx的时序约束实验，通过阅读本文档，你可以用全局时序约束来轻松提高已有的项目的系统时钟频率，同时你还可以用映射后静态时序报告以及布局布线后静态时序报告来分析你的设计性能(Xilinx timing constraints of the experiment, by reading this document, you can use the overall timing constraints to easily enhance existing projects the system clock frequency, at the same time you can also use static timing report after mapping, as well as after placement and routing static timing analysis report to you design performance)

这本书主要描述了如何使用system Verilog 建立测试平台和行为级模型(This book will describe how to use the system Verilog test bench and the establishment of behavioral models)