本文介绍了汉明编码与译码通过FPGA器件来实现，介绍了使用VHDL语言编程的基本算法！...

ModelSim的使用如何操作和使用以及安装如何安装

注意：是verilog语言写的 一bit的全加器，实现4位数的串行加法器，一个时钟能完成一次一bit的全加(Note: It is verilog language to write a bit full adder, to achieve four-digit serial adder, a clock can be completed once a bit full adder)

基于FPGA的数字系统设计,包含原理、工程应用和案例。(FPGA-based digital system design, including theory, engineering applications and cases.)

关于vhdl对硬件接口8237的编程，可以在进行fpga/cpld设计是作为模块用到-VHDL for the hardware interface on the 8237 programming, you can carrying out fpga/cpld design is used as a module

DDR3控制器源码，针对XilinxFPGA的DDR3控制器的源码，已经验证通过。(DDR3 Controller，complete DDR3 controll，have pass verificaion.)

VEROLOG的重要PPT资料,对初学者非常有益处-PPT important VEROLOG information is very useful for beginners

DESCRIPTION OF FULL ADDER

利用VHDL语言实现地铁售票系统的设计。售票系统根据途经站数自动计算票价(Using VHDL language metro ticket system. Ticketing system automatically calculated according to the number of fares via station)

实现拟想要的音乐，基于at89s51单片机的电子琴设计！(To achieve the desired music to be based at89s51 keyboard microcontroller design!)

Bringing SMW2:YI Back To LIFE Through Rom!