使用 fpga 斯巴达在 xilinx 的 SD 卡

MBD-FPGA数字滤波器设计基本流程,基于DSP builder(MBD-FPGA basic process of digital filter design)

说明：  内附几十种小程序，有状态机、比较器、波形发生器、乘法器、加法器、步进电机控制器等，希望大家能用的上。(Containing dozens of small programs, for reference，This is about FPGA,a tool ,we can study,but in ourselves.)

吠陀复用代码执行乘法的4位和8位使用进位选择加法器

MIMO系统采用QR检测算法的MATLAT仿真程序(mimo qr)

通过verilog语言实现各种基本信号的调制解调过程，包括2psk,qpsk,ppm(Realize the modulation and demodulation process of various basic signals through verilog language, including 2psk, qpsk, ppm)

用verilog语言写的串口通信程序,包括收发两个模块,可用于FPGA的通信中,可通过程序设置收发的位数,有很好的扩展性.-Verilog language used to write serial communication program, including the sending and receiving two modules can be used for FPGA communications, you can send and receive through the program to set the number of bits, there is a very good scalability.

Altera Sdram IP 源码，VHDL写的-Altera Sdram IP source code, VHDL written

vhdl经典源代码――时钟设计，入门者必须掌握-vhdl classical source code-- Clock Design, beginners must master

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

说明：  qpsk的fpga实现，包含调制和解调部分，使用verilog语言(FPGA implementation of QPSK)