Altera Sdram IP 源码，VHDL写的

tPad DE2-115/70开发板可用的摄像头采集、显示程序，QT10.0以上环境可用，原装代码，可以进行修改加以使用，如使用到倒车影像系统中，视频显示等。(tPad DE2-115/70 development board available cameras capture, display program, QT10.0 over the environment is available, the original code can be modified to be used, such as the use of the reversing video system, the video display.)

通过凌阳16位单片机实现复读机的应用的程序。(By Sunplus 16-bit MCU repeater application process.)

说明：  实现24小时计时，因为位数不够，这里是12进位，可自行调整进位数(Realize 24-hour timing, because the number of digits is not enough, here is 12 carry, you can adjust the carry number by yourself.)

说明：  基于HSPICE实现的反相器链，并分析电路延时(Inverter chain based on HSPICE, and analyze circuit delay)

usb读取，仅供参考，在实际应用中要更改以下数据。(Read usb data)

本代码实现了移位寄存器功能，初学者可借鉴学习-This code implements the shift register functions, beginners can learn to learn

这是一个基于可编程逻辑器件的程序，用来实现自动转换量程频率计控制器，该程序在可以再仿真器上仿真实现-This is a programmable logic device based on the procedures used to automatically convert the frequency range of the controller, the program can be in the simulation simulator

这是Xilinx ISE 14.X以及vivado、vivado_hls的license，亲测可用(Xilinx ISE 14.x vivado, vivado_hls license, pro-test available)

一个8位CISC结构的精简CPU，2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler

VHDL实现led灯的动态扫描，主要对CLK进行分频-VHDL realization led lamp dynamic scan, the main points of the CLK to the frequency