四位动态数码管显示数字时钟的分位和秒位。工具：Quartus ii 6.0 语言：VHDL...

Digital Design and Modeling with VHDL and Synthesis

在Quartus中，利用FPGA例化的存储器实现程序的BOOTLOADER的搬移(In Quartus, the use of FPGA case of memory to achieve the program' s move BOOTLOADER)

说明：  Quartus II TimeQuest 时序分析器说明书；这本手册包含一组设计场景、约束指南以及相关建议。您应该熟悉 TimeQuest Timing Analyzer 和 Synopsys Design Constraint(SDC) 的基础知识，以便正确地使用这些指南。(Quartus II timequest timing analyzer manual; this manual contains a set of design scenarios, constraint guidelines, and related recommendations. You should be familiar with the basics of timequest timing analyzer and Synopsys design constraint (SDC) to use these guidelines correctly.)

自己写的7人表决器的verilog程序，实现4人以上通过则通过的功能。(Seven people to write their own voting machine verilog program to achieve four or more people pass through function.)

Quartus环境下使用Verilog编写的HDB3编解码程序，RTL和时序仿真已过(Quartus under the environment of a HDB3 protocol procedures written in Verilog, RTL and timing simulation has be passed)

Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design due to its speed, burst access and pipeline features. For high-end applications using processors such as Motorola MPC 8260 or Intel StrongArm, the interface to the SDRAM is supported by the processor’s built-in peripheral module.

说明：  这是一个关于dQPSK的Matlab程序 这是一个关于dQPSK的Matlab程序 (This is a dQPSK the Matlab program This is a dQPSK the Matlab program)

4*4键盘小程序 两种算法内附检查LED(4* 4 keyboard applet containing two algorithms check the LED)

中值滤波实现。选择在Vivado软件上采用Verilog语言来编写中值滤波算法，搭建出完整的数据处理系统架构，通过仿真和验证来判断数据的处理效果，并在实际的设计过程中根据出现的问题提出解决方案。(Median filter implementation. The author chose Verilog language to write the median filter algorithm in Vivado software, built a complete data processing system architecture, judged the data processing effect through simulation and verification, and proposed a solution according to the problems in the actual design process.)

Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB(Xilinx, Altera, ARM, AVR, S52, Lattice series FPGA download cable circuit diagram and PCB)