这是FPGA的Spartan 3E基础工程文件。该项目是基于VGA游戏…

ADC TLC5510的测试程序，经过测试通过，十分简单好用-ADC TLC5510 test procedures, after the test is very simple and easy

使用verilog语言编写的异步串口模块，带有16级深的FIFO，它与DSP28335的SCI相似，可以帮助初学者更快地理解FPGA和DSP的硬件结构和编程思路(Use verilog language of asynchronous serial port module, FIFO with deep level 16, it was similar with DSP28335 SCI, can help beginners to understand faster the FPGA and DSP hardware structure and programming ideas)

说明：  千年服务端修改工具，千年db数据在线修改(Millennium server modification tool Millennium server modification tool)

ethernet 10 0M MAC-ethernet MAC 10,100 M

本文描述了fpga中的亚稳态时如何产生的，以及如何计算亚稳态的平均无故障时间。对了解亚稳态有帮助。-This paper describes the sub-fpga how the steady state, as well as how to calculate the metastable MTBF. The understanding of metastable helpful.

说明：  FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)

VHDL is defined by IEEE Standard 1076, IEEE Standard VHDL Language Reference Manual (the VHDL LRM). The original standard was approved in 1987. IEEE procedures require that standards be periodically reviewed and either reaffirmed or revised. The VHDL standard was revised in 1993, 2000, and 2002. In each revision, new language features were added and some existing features enhanced. The aim in each revision was to improve the language as a tool for design and verification of digital systems. Since the 2002 revision, there have two parallel efforts to further develop the language. The first was the VHDL Procedural Interface (VHPI) Task Force, a subcommittee of the IEEE P1076 Working Group. The VHPI Task Force prepared an interim amendment to the standard, formally approved by IEEE in March 2007. The amendment is titled IEEE 1076c, Standard VHDL Language Reference Manual―Amendment 1: Procedural Language Application Interface.

Learning Verilog Chinese Version Part 8

实现基于FPGA的vga显示，亲测能编译得过，不同开发版应该要相应改动（PS: 不太了解）

基于FPGA的CPU核及其虚拟平台的设计与实现-FPGA-based CPU core and its virtual platform design and implementation of