vhdl,序列信号发生器，发出11101010，可更改为任意序列

32-bit shifter, shifter, 32-bit.Very goog as a study file.

ya 3an zok omkom 9a7ba

本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述，只是比较简单的例子，适合初学者做了解用，本人亲自在EP2C8Q上实践。(The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language description, but relatively simple example for beginners to do with understanding, I personally EP2C8Q on practice.)

VHDL，verilog串并转换源程序 Xilinx公司参考资料-VHDL, verilog Series and conversion company Xilinx reference source

FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.

verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."

Xilinx FPGA reset usage

FPGA implementation of simple Multi-tone Electronic Keyboard using DE2-115 board with a PS/2 keyboard and speaker

JOP的RAM VHDL源码，经典的经典，不易找到的好东东，-JOP of RAM VHDL source code, classic classics, difficult to find a good price.

在Quartus II 上编程的基于FPGA的LED显示实验(Programming in the Quartus II LED display experiment based on FPGA )