登录
首页 » VHDL » VHDL,verilog串并转换源程序 Xilinx公司参考资料

VHDL,verilog串并转换源程序 Xilinx公司参考资料

于 2023-04-26 发布 文件大小:26.65 kB
0 156
下载积分: 2 下载次数: 1

代码说明:

VHDL,verilog串并转换源程序 Xilinx公司参考资料-VHDL, verilog Series and conversion company Xilinx reference source

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • on a serial data input timing will be based on output data using two procedures
    关于一个串行数据输入 根据时序将数据分两路输出的程序 -on a serial data input timing will be based on output data using two procedures
    2022-07-26 17:19:57下载
    积分:1
  • PR-QMF
    实现基于matlab的QMFB的完全重建,是一篇经过仿真且经过测试的正确的代码,可用价值比较高。(Based on matlab QMFB the completely rebuilt, is a through simulation and tested the correct code, can be relatively high value.)
    2012-12-14 11:49:30下载
    积分:1
  • GPS全球定位接收机 原理与软件实现_12378929
    说明:  本书从电子技术和通信系统的角度讲解gps接收机的设计开发原理,其内容集中在用户终端,即接收机的设计原理和软件实现上。全书分为两大部分,第一部分为理论篇,第二部分为实现篇。理论篇首先对导航的基本目的进行了阐述,并由一个浅显的二维导航系统对导航信号的特点进行了推导,随后阐述了gps信号格式,同时对于直接影响接收机性能的射频前端部分做了理论分析;实现篇主要对本书实现的软件gps接收机的系统实现和源代码进行了讲解,同时作为总结,将信号处理的结果和有意义的中间变量以图示的方式给出,可以使读者有一个感性的认识,同时提升学习兴趣。. 本书适合从事卫星导航接收机研发的技术人员和卫星通信接收机研究的研究人员,尤其是从事北斗系统研发的专业人员、cdma通信系统研发人员,以及通信电子类专业的高年级本科生和研究生阅读,既可作为教学培训的教材,也可作为相关专业工程技术人员的参考资料。(This book explains the design and development principle of the GPS receiver from the perspective of electronic technology and communication system. Its content focuses on the design principle and software implementation of the user terminal, that is, the receiver. The whole book is divided into two parts. The first part is the theoretical part and the second part is the realization part. Firstly, the basic purpose of navigation is expounded, and the characteristics of navigation signal are deduced by a simple two-dimensional navigation system. Then, the format of GPS signal is expounded. At the same time, the front-end part of radio frequency which directly affects the performance of the receiver is theoretically analyzed.)
    2019-05-05 08:54:24下载
    积分:1
  • LDPC_Encoder
    verilog 编写的ldpc编码,含有两个文件(LDPC written by Verilog)
    2021-03-08 19:19:28下载
    积分:1
  • bt656_decode
    说明:  将嵌入式BT656格式数据解码出带行场同步信号的YCbCr422格式数据(Decoding Embedded BT656 Format Data to YCbCr422 Format Data with Field Synchronization Signa)
    2021-01-28 10:38:35下载
    积分:1
  • CIC
    Efficient CIC filter Implementation using VHDL
    2010-11-19 08:54:23下载
    积分:1
  • PN_GEN
    说明:  一个PN序列发生器,大M序列,供参考学习,(A PN sequence generator, the M series, for reference study,)
    2008-10-20 13:46:45下载
    积分:1
  • spi_hello
    SPI接口测试程序,Xilinx参考设计,ML507硬件测试通过.(SPI interface test code,Xilinx reference design,tested on ML507 platform.)
    2013-09-01 09:37:04下载
    积分:1
  • Variable Reduction Testbench通过对变量进行相关性分析来实现减少变量的目的。...
    Variable Reduction Testbench通过对变量进行相关性分析来实现减少变量的目的。-Variable Reduction Testbench is a MATLAB module that allows the application of several methods for variable reduction based on correlation analysis
    2022-03-21 18:04:20下载
    积分:1
  • VHDL
    VHDL-2008 Just the New Stuff Peter J. Ashenden Consultant Ashenden Designs
    2022-03-31 09:30:59下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载