described dds direct digital frequency synthesis of the basic tenets addition to...

说明：  本代码是控制DS1302的VHDL代码，浅显易懂，方便修改，注意看data sheet，保证时钟和各个延迟满足要求即可(This code is to control the DS1302' s VHDL code, easy to understand, easy changes, note the data sheet, ensure the clock and can meet the requirements of the various delays)

reversible Data Hiding in Encrypted Images by Reserving Room Before Encryption

Its project to move your mouse cursor on a vga monitor. it is very funny -)(Its project to move your mouse cursor on a vga monitor. it is very funny -))

一个计算机原理课程设计的作业，5级流水线CPU，指令集到代码均为自己设计，有最终报告文档，组建说明，并行除法，16位字长，定长指令，Verilog源代码，顶层设计图。结构简单，冲突解决方式也很简单，代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)

王金明的一些学习VHDL的子-Wang Jinming study of some subset of VHDL

goertzel stuff. contains matlab files and different explanations of how it is used for DTMF decoding.

code for fft non synthesisable in xilinx ise

SOC Verfication Methodology and Techniques

一款介绍Soc使用的PDF文档供大家看和实践，还是有一定参考价值的！-A description Soc using PDF documents for everyone to see and practice, there are still some reference value!

布尔乘法器带testbench好用的工程啊(Boolean multiplier works with testbench nice ah)