VHDL basic computing, the use of 8bit for the multiplier, will be the value of t...

清华大学电子课程设计：Verilog，QuartusII可正确运行，可下载到FPGA上，音乐计算器，完成两个三位数的运算，有注释，很强大！！(Verilog, QuartusII run correctly, can be downloaded to the FPGA, music, calculator, completed two three-digit operations, there are notes, very powerful! !)

一个简单的后台模板，主要为贵金属直播室有喊单等功能类型的。 ps：由于涉及到iframe本地跨域问题，因此查看时请在服务器上进行审阅。(A simple background template, mainly for the precious metal living room, such as the type of function. PS: as a result of the local cross domain problem involved in the iframe, so check it out on the server.)

ip core of the transceiver gtx

说明：  Xilinx CORDIC 算法 MATLAB Verilog仿真(arctan.m Kn.m sin_cos.m MATLAB Verilog)

DDS 产生正弦信号，OOK，AM三种波形。 使用xilinx FPGA VHDL(DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.)

描述了使用FPGA接口PDIUSBD12开发USB接口的流程.-Describes the use of FPGA Interface USB interface PDIUSBD12 development flow.

实现了四bit计数器的功能，使用的是VHDL语言描述(Four-bit counter, using the VHDL language description)

EP2C35A实验箱基于NIOSII的串行AD_DA编程(EP2C35A experimental box based NIOSII the serial AD_DA programming)

说明：  VHDL code for LCD for use with AGM FPGA

基于EDA技术的数字密码锁源程序代码,大学实训用的着-EDA-based Digital code lock source code, used by the University Training